diff mbox series

[04/15] drm/i915/display: convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display

Message ID 3b045c864325b9ffbbc00c9b6f0f95305798223e.1730740629.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/display: convert display feature helpers to struct intel_display | expand

Commit Message

Jani Nikula Nov. 4, 2024, 5:19 p.m. UTC
Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
drive-by conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
 drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
 drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
 4 files changed, 8 insertions(+), 5 deletions(-)

Comments

Vinod Govindapillai Nov. 6, 2024, 9:17 a.m. UTC | #1
On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
>  drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
>  4 files changed, 8 insertions(+), 5 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 863927f429aa..57b42554d656 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5322,6 +5322,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>                           const struct intel_crtc_state *pipe_config,
>                           bool fastset)
>  {
> +       struct intel_display *display = to_intel_display(current_config);
>         struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
>         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>         struct drm_printer p;
> @@ -5562,7 +5563,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>         PIPE_CONF_CHECK_I(lane_count);
>         PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> -       if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
> +       if (HAS_DOUBLE_BUFFERED_M_N(display)) {
>                 if (!fastset || !pipe_config->update_m_n)
>                         PIPE_CONF_CHECK_M_N(dp_m_n);
>         } else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 70d1beebbf8f..e11993a6f042 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -149,7 +149,7 @@ struct intel_display_platforms {
>  #define HAS_DDI(i915)                  (DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)              (DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>  #define HAS_DMC(i915)                  (DISPLAY_RUNTIME_INFO(i915)->has_dmc)
> -#define HAS_DOUBLE_BUFFERED_M_N(i915)  (DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> +#define HAS_DOUBLE_BUFFERED_M_N(__display)     (DISPLAY_VER(__display) >= 9 || (__display)-
> >platform.broadwell)
>  #define HAS_DP_MST(i915)               (DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)                 (IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)                  (DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ff5ba7b3035f..a27da96d2c60 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1700,13 +1700,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  
>  static bool has_seamless_m_n(struct intel_connector *connector)
>  {
> -       struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +       struct intel_display *display = to_intel_display(connector);
>  
>         /*
>          * Seamless M/N reprogramming only implemented
>          * for BDW+ double buffered M/N registers so far.
>          */
> -       return HAS_DOUBLE_BUFFERED_M_N(i915) &&
> +       return HAS_DOUBLE_BUFFERED_M_N(display) &&
>                 intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index bb39eb96e812..0fec01b79b23 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -68,7 +68,9 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
>  bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>                                    enum transcoder cpu_transcoder)
>  {
> -       if (HAS_DOUBLE_BUFFERED_M_N(i915))
> +       struct intel_display *display = &i915->display;
> +
> +       if (HAS_DOUBLE_BUFFERED_M_N(display))
>                 return true;
>  
>         return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
Rodrigo Vivi Nov. 6, 2024, 4:46 p.m. UTC | #2
On Mon, Nov 04, 2024 at 07:19:18PM +0200, Jani Nikula wrote:
> Convert HAS_DOUBLE_BUFFERED_M_N() to struct intel_display. Do minimal
> drive-by conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c        | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display_device.h | 2 +-
>  drivers/gpu/drm/i915/display/intel_dp.c             | 4 ++--
>  drivers/gpu/drm/i915/display/intel_drrs.c           | 4 +++-
>  4 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 863927f429aa..57b42554d656 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5322,6 +5322,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  			  const struct intel_crtc_state *pipe_config,
>  			  bool fastset)
>  {
> +	struct intel_display *display = to_intel_display(current_config);
>  	struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
>  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
>  	struct drm_printer p;
> @@ -5562,7 +5563,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_I(lane_count);
>  	PIPE_CONF_CHECK_X(lane_lat_optim_mask);
>  
> -	if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
> +	if (HAS_DOUBLE_BUFFERED_M_N(display)) {
>  		if (!fastset || !pipe_config->update_m_n)
>  			PIPE_CONF_CHECK_M_N(dp_m_n);
>  	} else {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index 70d1beebbf8f..e11993a6f042 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -149,7 +149,7 @@ struct intel_display_platforms {
>  #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
>  #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
>  #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
> -#define HAS_DOUBLE_BUFFERED_M_N(i915)	(DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
> +#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
>  #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ff5ba7b3035f..a27da96d2c60 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1700,13 +1700,13 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
>  
>  static bool has_seamless_m_n(struct intel_connector *connector)
>  {
> -	struct drm_i915_private *i915 = to_i915(connector->base.dev);
> +	struct intel_display *display = to_intel_display(connector);
>  
>  	/*
>  	 * Seamless M/N reprogramming only implemented
>  	 * for BDW+ double buffered M/N registers so far.
>  	 */
> -	return HAS_DOUBLE_BUFFERED_M_N(i915) &&
> +	return HAS_DOUBLE_BUFFERED_M_N(display) &&
>  		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index bb39eb96e812..0fec01b79b23 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -68,7 +68,9 @@ const char *intel_drrs_type_str(enum drrs_type drrs_type)
>  bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
>  				   enum transcoder cpu_transcoder)
>  {
> -	if (HAS_DOUBLE_BUFFERED_M_N(i915))
> +	struct intel_display *display = &i915->display;
> +
> +	if (HAS_DOUBLE_BUFFERED_M_N(display))
>  		return true;
>  
>  	return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
> -- 
> 2.39.5
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 863927f429aa..57b42554d656 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5322,6 +5322,7 @@  intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 			  const struct intel_crtc_state *pipe_config,
 			  bool fastset)
 {
+	struct intel_display *display = to_intel_display(current_config);
 	struct drm_i915_private *dev_priv = to_i915(current_config->uapi.crtc->dev);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	struct drm_printer p;
@@ -5562,7 +5563,7 @@  intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_I(lane_count);
 	PIPE_CONF_CHECK_X(lane_lat_optim_mask);
 
-	if (HAS_DOUBLE_BUFFERED_M_N(dev_priv)) {
+	if (HAS_DOUBLE_BUFFERED_M_N(display)) {
 		if (!fastset || !pipe_config->update_m_n)
 			PIPE_CONF_CHECK_M_N(dp_m_n);
 	} else {
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 70d1beebbf8f..e11993a6f042 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -149,7 +149,7 @@  struct intel_display_platforms {
 #define HAS_DDI(i915)			(DISPLAY_INFO(i915)->has_ddi)
 #define HAS_DISPLAY(i915)		(DISPLAY_RUNTIME_INFO(i915)->pipe_mask != 0)
 #define HAS_DMC(i915)			(DISPLAY_RUNTIME_INFO(i915)->has_dmc)
-#define HAS_DOUBLE_BUFFERED_M_N(i915)	(DISPLAY_VER(i915) >= 9 || IS_BROADWELL(i915))
+#define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
 #define HAS_DP_MST(i915)		(DISPLAY_INFO(i915)->has_dp_mst)
 #define HAS_DP20(i915)			(IS_DG2(i915) || DISPLAY_VER(i915) >= 14)
 #define HAS_DPT(i915)			(DISPLAY_VER(i915) >= 13)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ff5ba7b3035f..a27da96d2c60 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1700,13 +1700,13 @@  static int intel_dp_max_bpp(struct intel_dp *intel_dp,
 
 static bool has_seamless_m_n(struct intel_connector *connector)
 {
-	struct drm_i915_private *i915 = to_i915(connector->base.dev);
+	struct intel_display *display = to_intel_display(connector);
 
 	/*
 	 * Seamless M/N reprogramming only implemented
 	 * for BDW+ double buffered M/N registers so far.
 	 */
-	return HAS_DOUBLE_BUFFERED_M_N(i915) &&
+	return HAS_DOUBLE_BUFFERED_M_N(display) &&
 		intel_panel_drrs_type(connector) == DRRS_TYPE_SEAMLESS;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index bb39eb96e812..0fec01b79b23 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -68,7 +68,9 @@  const char *intel_drrs_type_str(enum drrs_type drrs_type)
 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
 				   enum transcoder cpu_transcoder)
 {
-	if (HAS_DOUBLE_BUFFERED_M_N(i915))
+	struct intel_display *display = &i915->display;
+
+	if (HAS_DOUBLE_BUFFERED_M_N(display))
 		return true;
 
 	return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);