| Message ID | 20241107161123.16269-6-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915: Potential boot oops fix and some cleanups | expand |
On Thu, 07 Nov 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > ADPA_HOTPLUG_BITS is defined in terms of the individual > register bits and is defined in intel_crt.c, whereas the > counterpart mask (ADPA_CRT_HOTPLUG_MASK) is just defined > as a raw hex constant and lives in i915_reg.h. Just define > both the same way (with unified name to boot) and move both > to intel_crt.c since they are more an implementation detail > rather than anything to do with the actual regiter definitions. *register Reviewed-by: Jani Nikula <jani.nikula@intel.com> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_crt.c | 16 ++++++++++++---- > drivers/gpu/drm/i915/i915_reg.h | 1 - > 2 files changed, 12 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c > index 73d5332cf103..e21e402f85c8 100644 > --- a/drivers/gpu/drm/i915/display/intel_crt.c > +++ b/drivers/gpu/drm/i915/display/intel_crt.c > @@ -55,12 +55,20 @@ > #include "intel_pch_refclk.h" > > /* Here's the desired hotplug mode */ > -#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ > +#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_ENABLE | \ > + ADPA_CRT_HOTPLUG_PERIOD_128 | \ > ADPA_CRT_HOTPLUG_WARMUP_10MS | \ > ADPA_CRT_HOTPLUG_SAMPLE_4S | \ > ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ > - ADPA_CRT_HOTPLUG_VOLREF_325MV | \ > - ADPA_CRT_HOTPLUG_ENABLE) > + ADPA_CRT_HOTPLUG_VOLREF_325MV) > +#define ADPA_HOTPLUG_MASK (ADPA_CRT_HOTPLUG_MONITOR_MASK | \ > + ADPA_CRT_HOTPLUG_ENABLE | \ > + ADPA_CRT_HOTPLUG_PERIOD_MASK | \ > + ADPA_CRT_HOTPLUG_WARMUP_MASK | \ > + ADPA_CRT_HOTPLUG_SAMPLE_MASK | \ > + ADPA_CRT_HOTPLUG_VOLTAGE_MASK | \ > + ADPA_CRT_HOTPLUG_VOLREF_MASK | \ > + ADPA_CRT_HOTPLUG_FORCE_TRIGGER) > > struct intel_crt { > struct intel_encoder base; > @@ -984,7 +992,7 @@ void intel_crt_reset(struct drm_encoder *encoder) > u32 adpa; > > adpa = intel_de_read(display, crt->adpa_reg); > - adpa &= ~ADPA_CRT_HOTPLUG_MASK; > + adpa &= ~ADPA_HOTPLUG_MASK; > adpa |= ADPA_HOTPLUG_BITS; > intel_de_write(display, crt->adpa_reg, adpa); > intel_de_posting_read(display, crt->adpa_reg); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index f233fc32e45c..6391f2e9d530 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1156,7 +1156,6 @@ > #define ADPA_PIPE_SEL(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK, (pipe)) > #define ADPA_PIPE_SEL_MASK_CPT REG_GENMASK(30, 29) > #define ADPA_PIPE_SEL_CPT(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK_CPT, (pipe)) > -#define ADPA_CRT_HOTPLUG_MASK 0x03ff0000 /* bit 25-16 */ > #define ADPA_CRT_HOTPLUG_MONITOR_MASK REG_GENMASK(25, 24) > #define ADPA_CRT_HOTPLUG_MONITOR_NONE REG_FIELD_PREP(ADPA_CRT_HOTPLUG_MONITOR_MASK, 0) > #define ADPA_CRT_HOTPLUG_MONITOR_COLOR REG_FIELD_PREP(ADPA_CRT_HOTPLUG_MONITOR_MASK, 3)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c index 73d5332cf103..e21e402f85c8 100644 --- a/drivers/gpu/drm/i915/display/intel_crt.c +++ b/drivers/gpu/drm/i915/display/intel_crt.c @@ -55,12 +55,20 @@ #include "intel_pch_refclk.h" /* Here's the desired hotplug mode */ -#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ +#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_ENABLE | \ + ADPA_CRT_HOTPLUG_PERIOD_128 | \ ADPA_CRT_HOTPLUG_WARMUP_10MS | \ ADPA_CRT_HOTPLUG_SAMPLE_4S | \ ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ - ADPA_CRT_HOTPLUG_VOLREF_325MV | \ - ADPA_CRT_HOTPLUG_ENABLE) + ADPA_CRT_HOTPLUG_VOLREF_325MV) +#define ADPA_HOTPLUG_MASK (ADPA_CRT_HOTPLUG_MONITOR_MASK | \ + ADPA_CRT_HOTPLUG_ENABLE | \ + ADPA_CRT_HOTPLUG_PERIOD_MASK | \ + ADPA_CRT_HOTPLUG_WARMUP_MASK | \ + ADPA_CRT_HOTPLUG_SAMPLE_MASK | \ + ADPA_CRT_HOTPLUG_VOLTAGE_MASK | \ + ADPA_CRT_HOTPLUG_VOLREF_MASK | \ + ADPA_CRT_HOTPLUG_FORCE_TRIGGER) struct intel_crt { struct intel_encoder base; @@ -984,7 +992,7 @@ void intel_crt_reset(struct drm_encoder *encoder) u32 adpa; adpa = intel_de_read(display, crt->adpa_reg); - adpa &= ~ADPA_CRT_HOTPLUG_MASK; + adpa &= ~ADPA_HOTPLUG_MASK; adpa |= ADPA_HOTPLUG_BITS; intel_de_write(display, crt->adpa_reg, adpa); intel_de_posting_read(display, crt->adpa_reg); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f233fc32e45c..6391f2e9d530 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1156,7 +1156,6 @@ #define ADPA_PIPE_SEL(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK, (pipe)) #define ADPA_PIPE_SEL_MASK_CPT REG_GENMASK(30, 29) #define ADPA_PIPE_SEL_CPT(pipe) REG_FIELD_PREP(ADPA_PIPE_SEL_MASK_CPT, (pipe)) -#define ADPA_CRT_HOTPLUG_MASK 0x03ff0000 /* bit 25-16 */ #define ADPA_CRT_HOTPLUG_MONITOR_MASK REG_GENMASK(25, 24) #define ADPA_CRT_HOTPLUG_MONITOR_NONE REG_FIELD_PREP(ADPA_CRT_HOTPLUG_MONITOR_MASK, 0) #define ADPA_CRT_HOTPLUG_MONITOR_COLOR REG_FIELD_PREP(ADPA_CRT_HOTPLUG_MONITOR_MASK, 3)