mbox series

[v2,0/3] Introduce a new Write Protected pin inverted property

Message ID 20241104032104.2784183-1-jamin_lin@aspeedtech.com (mailing list archive)
Headers show
Series Introduce a new Write Protected pin inverted property | expand

Message

Jamin Lin Nov. 4, 2024, 3:21 a.m. UTC
change from v1:
1. Support RTC for AST2700.
2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
3. Introduce Capabilities Register 2 for SD slot 0 and 1.
4. Support create flash devices via command line for AST1030.

change from v2:
replace wp-invert with wp-inverted and fix review issues.

Jamin Lin (3):
  hw/sd/sdhci: Fix coding style
  hw/sd/sdhci: Introduce a new Write Protected pin inverted property
  hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
    AST2500 EVBs

 hw/arm/aspeed.c         |  8 +++++
 hw/sd/sdhci.c           | 70 ++++++++++++++++++++++++++++-------------
 include/hw/arm/aspeed.h |  1 +
 include/hw/sd/sdhci.h   |  5 +++
 4 files changed, 62 insertions(+), 22 deletions(-)

Comments

Jamin Lin Nov. 14, 2024, 5:32 a.m. UTC | #1
Hi Cedric, Andrew

> Subject: [PATCH v2 0/3] Introduce a new Write Protected pin inverted property
> 
> change from v1:
> 1. Support RTC for AST2700.
> 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
> 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
> 4. Support create flash devices via command line for AST1030.
> 
> change from v2:
> replace wp-invert with wp-inverted and fix review issues.
> 
> Jamin Lin (3):
>   hw/sd/sdhci: Fix coding style
>   hw/sd/sdhci: Introduce a new Write Protected pin inverted property
>   hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
>     AST2500 EVBs
> 
>  hw/arm/aspeed.c         |  8 +++++
>  hw/sd/sdhci.c           | 70 ++++++++++++++++++++++++++++-------------
>  include/hw/arm/aspeed.h |  1 +
>  include/hw/sd/sdhci.h   |  5 +++
>  4 files changed, 62 insertions(+), 22 deletions(-)
> 

Could you please help to review this patch series?
Thanks-Jamin

> --
> 2.34.1
Cédric Le Goater Nov. 14, 2024, 7:31 a.m. UTC | #2
Hello Jamin,

On 11/14/24 06:32, Jamin Lin wrote:
> Hi Cedric, Andrew
> 
>> Subject: [PATCH v2 0/3] Introduce a new Write Protected pin inverted property
>>
>> change from v1:
>> 1. Support RTC for AST2700.
>> 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
>> 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
>> 4. Support create flash devices via command line for AST1030.
>>
>> change from v2:
>> replace wp-invert with wp-inverted and fix review issues.
>>
>> Jamin Lin (3):
>>    hw/sd/sdhci: Fix coding style
>>    hw/sd/sdhci: Introduce a new Write Protected pin inverted property
>>    hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
>>      AST2500 EVBs
>>
>>   hw/arm/aspeed.c         |  8 +++++
>>   hw/sd/sdhci.c           | 70 ++++++++++++++++++++++++++++-------------
>>   include/hw/arm/aspeed.h |  1 +
>>   include/hw/sd/sdhci.h   |  5 +++
>>   4 files changed, 62 insertions(+), 22 deletions(-)
>>
> 
> Could you please help to review this patch series?

We would need an Ack from the sd maintainer on patch 2. Then,
I can apply on the aspeed queue. That's material for QEMU 10.0.

Thanks,

C.
Jamin Lin Nov. 14, 2024, 8:45 a.m. UTC | #3
Hi Cedric,

> 
> Hello Jamin,
> 
> On 11/14/24 06:32, Jamin Lin wrote:
> > Hi Cedric, Andrew
> >
> >> Subject: [PATCH v2 0/3] Introduce a new Write Protected pin inverted
> >> property
> >>
> >> change from v1:
> >> 1. Support RTC for AST2700.
> >> 2. Support SDHCI write protected pin inverted for AST2500 and AST2600.
> >> 3. Introduce Capabilities Register 2 for SD slot 0 and 1.
> >> 4. Support create flash devices via command line for AST1030.
> >>
> >> change from v2:
> >> replace wp-invert with wp-inverted and fix review issues.
> >>
> >> Jamin Lin (3):
> >>    hw/sd/sdhci: Fix coding style
> >>    hw/sd/sdhci: Introduce a new Write Protected pin inverted property
> >>    hw/arm/aspeed: Invert sdhci write protected pin for AST2600 and
> >>      AST2500 EVBs
> >>
> >>   hw/arm/aspeed.c         |  8 +++++
> >>   hw/sd/sdhci.c           | 70
> ++++++++++++++++++++++++++++-------------
> >>   include/hw/arm/aspeed.h |  1 +
> >>   include/hw/sd/sdhci.h   |  5 +++
> >>   4 files changed, 62 insertions(+), 22 deletions(-)
> >>
> >
> > Could you please help to review this patch series?
> 
> We would need an Ack from the sd maintainer on patch 2. Then, I can apply on
> the aspeed queue. That's material for QEMU 10.0.
> 
Got it.
Thanks for your kindly support.
Jamin
> Thanks,
> 
> C.