| Message ID | 20241122124505.1688436-2-quic_mmanikan@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add SPI0 support for IPQ5424 | expand |
On Fri, Nov 22, 2024 at 06:15:02PM +0530, Manikanta Mylavarapu wrote: > The GPIO configuration differs for the spi0 clk, cs, miso, mosi pins. > Therefore, split the spi0 pin group and document each pin function. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > --- Missing Fixes tag. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml index 5e64a232fc7a..df284d3645c1 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml @@ -79,8 +79,8 @@ $defs: qdss_cti_trig_out_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a, qdss_tracedata_a, qspi_clk, qspi_cs, qspi_data, resout, rx0, rx1, rx2, sdc_clk, sdc_cmd, - sdc_data, spi0, spi1, spi10, spi11, tsens_max, uart0, uart1, - wci_txd, wci_rxd, wsi_clk, wsi_data ] + sdc_data, spi0_cs, spi0_clk, spi0_miso, spi0_mosi, spi1, spi10, + spi11, tsens_max, uart0, uart1, wci_txd, wci_rxd, wsi_clk, wsi_data ] required: - pins
The GPIO configuration differs for the spi0 clk, cs, miso, mosi pins. Therefore, split the spi0 pin group and document each pin function. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> --- .../devicetree/bindings/pinctrl/qcom,ipq5424-tlmm.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)