| Message ID | 20241126140003.74871-15-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Convert nanoMIPS LSA opcode to decodetree | expand |
On 11/26/24 08:00, Philippe Mathieu-Daudé wrote: > Once the xlat() and simm7() helpers are added, > the decoding is trivial. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> > --- > target/mips/tcg/micromips16.decode | 9 +++++++++ > target/mips/tcg/micromips_translate.c | 19 +++++++++++++++++++ > target/mips/tcg/micromips_translate.c.inc | 12 +----------- > 3 files changed, 29 insertions(+), 11 deletions(-) > > diff --git a/target/mips/tcg/micromips16.decode b/target/mips/tcg/micromips16.decode > index d341da16b04..fdc3b131c9c 100644 > --- a/target/mips/tcg/micromips16.decode > +++ b/target/mips/tcg/micromips16.decode > @@ -9,3 +9,12 @@ > # (Document Number: MD00582) > # microMIPS64 Instruction Set > # (Document Number: MD00594) > + > +&rd_imm rd imm > + > +%xlat_rd 7:3 !function=xlat > +%simm7 0:7 !function=simm7 Hmm... simm7 sounds like sign-extended imm7, which this is not. The encoding appears unique to LI16? Perhaps just li16_imm7? > + > +@rd_imm7 ...... ... ....... &rd_imm rd=%xlat_rd imm=%simm7 You need not define separate formats when they are one-off. > + > +LI 111011 ... ....... @rd_imm7 # LI16 > diff --git a/target/mips/tcg/micromips_translate.c b/target/mips/tcg/micromips_translate.c > index f0b5dbf655d..198eb466057 100644 > --- a/target/mips/tcg/micromips_translate.c > +++ b/target/mips/tcg/micromips_translate.c > @@ -9,11 +9,23 @@ > #include "qemu/osdep.h" > #include "translate.h" > > +static int xlat(DisasContext *ctx, int x) > +{ > + static const int map[] = { 16, 17, 2, 3, 4, 5, 6, 7 }; > + > + return map[x]; > +} > + > static inline int plus_1(DisasContext *ctx, int x) > { > return x + 1; > } > > +static inline int simm7(DisasContext *ctx, int x) > +{ > + return x == 0x7f ? -1 : x; > +} Don't mark inline. Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/tcg/micromips16.decode b/target/mips/tcg/micromips16.decode index d341da16b04..fdc3b131c9c 100644 --- a/target/mips/tcg/micromips16.decode +++ b/target/mips/tcg/micromips16.decode @@ -9,3 +9,12 @@ # (Document Number: MD00582) # microMIPS64 Instruction Set # (Document Number: MD00594) + +&rd_imm rd imm + +%xlat_rd 7:3 !function=xlat +%simm7 0:7 !function=simm7 + +@rd_imm7 ...... ... ....... &rd_imm rd=%xlat_rd imm=%simm7 + +LI 111011 ... ....... @rd_imm7 # LI16 diff --git a/target/mips/tcg/micromips_translate.c b/target/mips/tcg/micromips_translate.c index f0b5dbf655d..198eb466057 100644 --- a/target/mips/tcg/micromips_translate.c +++ b/target/mips/tcg/micromips_translate.c @@ -9,11 +9,23 @@ #include "qemu/osdep.h" #include "translate.h" +static int xlat(DisasContext *ctx, int x) +{ + static const int map[] = { 16, 17, 2, 3, 4, 5, 6, 7 }; + + return map[x]; +} + static inline int plus_1(DisasContext *ctx, int x) { return x + 1; } +static inline int simm7(DisasContext *ctx, int x) +{ + return x == 0x7f ? -1 : x; +} + /* Include the auto-generated decoders. */ #include "decode-micromips16.c.inc" #include "decode-micromips32.c.inc" @@ -22,3 +34,10 @@ static bool trans_LSA(DisasContext *ctx, arg_r *a) { return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } + +static bool trans_LI(DisasContext *ctx, arg_rd_imm *a) +{ + gen_li(ctx, a->rd, a->imm); + + return true; +} diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index 73394554509..cb98d6af7e4 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -113,7 +113,6 @@ enum { BLTZALC = 0x38, BLTUC = 0x38, SW16 = 0x3a, - LI16 = 0x3b, JALX32 = 0x3c, JAL32 = 0x3d, BLEZC = 0x3d, @@ -3004,7 +3003,7 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) case 2: /* LBU16, LHU16, LWSP16, LW16, SB16, SH16, SWSP16, SW16 */ case 3: - /* MOVE16, ANDI16, POOL16D, POOL16E, BEQZ16, BNEZ16, B16, LI16 */ + /* MOVE16, ANDI16, POOL16D, POOL16E, BEQZ16, BNEZ16, B16 */ if (ctx->hflags & MIPS_HFLAG_BDS32) { gen_reserved_instruction(ctx); return 2; @@ -3214,15 +3213,6 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) (ctx->insn_flags & ISA_MIPS_R6) ? 0 : 4); break; - case LI16: - { - int reg = mmreg(uMIPS_RD(ctx->opcode)); - int imm = ZIMM(ctx->opcode, 0, 7); - - imm = (imm == 0x7f ? -1 : imm); - tcg_gen_movi_tl(cpu_gpr[reg], imm); - } - break; case RES_29: case RES_31: case RES_39:
Once the xlat() and simm7() helpers are added, the decoding is trivial. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/mips/tcg/micromips16.decode | 9 +++++++++ target/mips/tcg/micromips_translate.c | 19 +++++++++++++++++++ target/mips/tcg/micromips_translate.c.inc | 12 +----------- 3 files changed, 29 insertions(+), 11 deletions(-)