| Message ID | 20241128104310.3452934-11-peter.maydell@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | fpu: Make pickNaNMulAdd behaviour runtime selected | expand |
On 11/28/24 04:42, Peter Maydell wrote: > Set the FloatInfZeroNaNRule explicitly for the xtensa target, > so we can remove the ifdef from pickNaNMulAdd(). > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/xtensa/cpu.c | 2 ++ > fpu/softfloat-specialize.c.inc | 2 +- > 2 files changed, 3 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 6f9039abaee..3163b758235 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -133,6 +133,8 @@ static void xtensa_cpu_reset_hold(Object *obj, ResetType type) reset_mmu(env); cs->halted = env->runstall; #endif + /* For inf * 0 + NaN, return the input NaN */ + set_float_infzeronan_rule(float_infzeronan_dnan_never, &env->fp_status); set_no_signaling_nans(!dfpu, &env->fp_status); xtensa_use_first_nan(env, !dfpu); } diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc index 7e57e85348b..3062d19402d 100644 --- a/fpu/softfloat-specialize.c.inc +++ b/fpu/softfloat-specialize.c.inc @@ -489,7 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls, /* * Temporarily fall back to ifdef ladder */ -#if defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ +#if defined(TARGET_HPPA) || \ defined(TARGET_I386) || defined(TARGET_LOONGARCH) /* * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan)
Set the FloatInfZeroNaNRule explicitly for the xtensa target, so we can remove the ifdef from pickNaNMulAdd(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/xtensa/cpu.c | 2 ++ fpu/softfloat-specialize.c.inc | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-)