| Message ID | 20241201234613.52322-1-pbrobinson@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: enable rng on all rk356x | expand |
Hello Peter, On 2024-12-02 00:46, Peter Robinson wrote: > The rk356x rng is available on both the rk3566 and rk3568 > parts, the IP is all self contained within the SoCs so > it's enabled already by default on rk3568 so let's enable > it in the base rk356x.dtsi so it's enabled consistently > everywhere. Please, go through the mailing list threads [1][2] that have led us to the current state. To sum it up, it isn't about what's supported in the two RK356x SoC variants, but about the RK3566's HWRNG being disabled because the testing showed that it produces unacceptably low quality of random data, for some yet unknown reason. [1] https://lore.kernel.org/linux-rockchip/cover.1720969799.git.daniel@makrotopia.org/T/#u [2] https://lore.kernel.org/linux-rockchip/cover.1722355365.git.daniel@makrotopia.org/T/#u > Signed-off-by: Peter Robinson <pbrobinson@gmail.com> > --- > arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ---- > arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 1 - > 2 files changed, 5 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > index ecaefe208e3e..9dc09db5034d 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi > @@ -397,10 +397,6 @@ power-domain@RK3568_PD_PIPE { > }; > }; > > -&rng { > - status = "okay"; > -}; > - > &usb_host0_xhci { > phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; > phy-names = "usb2-phy", "usb3-phy"; > diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > index 62be06f3b863..2994cddb3464 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi > @@ -1038,7 +1038,6 @@ rng: rng@fe388000 { > clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; > clock-names = "core", "ahb"; > resets = <&cru SRST_TRNG_NS>; > - status = "disabled"; > }; > > i2s0_8ch: i2s@fe400000 {
W dniu 2.12.2024 o 04:55, Dragan Simic pisze: > On 2024-12-02 00:46, Peter Robinson wrote: >> The rk356x rng is available on both the rk3566 and rk3568 >> parts, the IP is all self contained within the SoCs so >> it's enabled already by default on rk3568 so let's enable >> it in the base rk356x.dtsi so it's enabled consistently >> everywhere. > > Please, go through the mailing list threads [1][2] that have led us > to the current state. To sum it up, it isn't about what's supported > in the two RK356x SoC variants, but about the RK3566's HWRNG being > disabled because the testing showed that it produces unacceptably > low quality of random data, for some yet unknown reason. So maybe there should be a comment in rockchip/rk3568.dtsi so we would not get back to it again.
On Mon Dec 2, 2024 at 11:40 AM CET, Marcin Juszkiewicz wrote: > W dniu 2.12.2024 o 04:55, Dragan Simic pisze: > > On 2024-12-02 00:46, Peter Robinson wrote: > >> The rk356x rng is available on both the rk3566 and rk3568 > >> parts, the IP is all self contained within the SoCs so > >> it's enabled already by default on rk3568 so let's enable > >> it in the base rk356x.dtsi so it's enabled consistently > >> everywhere. > > > > Please, go through the mailing list threads [1][2] that have led us > > to the current state. To sum it up, it isn't about what's supported > > in the two RK356x SoC variants, but about the RK3566's HWRNG being > > disabled because the testing showed that it produces unacceptably > > low quality of random data, for some yet unknown reason. > > So maybe there should be a comment in rockchip/rk3568.dtsi so we would > not get back to it again. I suggested to put that in the (original) commit message: https://lore.kernel.org/linux-rockchip/6690040.iosknibmi9@bagend/ precisely because this was quite predictable to happen. So a +1 on a comment in the dtsi with a link to the discussion in the commit message.
diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index ecaefe208e3e..9dc09db5034d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -397,10 +397,6 @@ power-domain@RK3568_PD_PIPE { }; }; -&rng { - status = "okay"; -}; - &usb_host0_xhci { phys = <&usb2phy0_otg>, <&combphy0 PHY_TYPE_USB3>; phy-names = "usb2-phy", "usb3-phy"; diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index 62be06f3b863..2994cddb3464 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -1038,7 +1038,6 @@ rng: rng@fe388000 { clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; clock-names = "core", "ahb"; resets = <&cru SRST_TRNG_NS>; - status = "disabled"; }; i2s0_8ch: i2s@fe400000 {
The rk356x rng is available on both the rk3566 and rk3568 parts, the IP is all self contained within the SoCs so it's enabled already by default on rk3568 so let's enable it in the base rk356x.dtsi so it's enabled consistently everywhere. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> --- arch/arm64/boot/dts/rockchip/rk3568.dtsi | 4 ---- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 1 - 2 files changed, 5 deletions(-)