Message ID | 20241202074615.3601692-2-animesh.manna@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | LOBF enablement fix | expand |
On Mon, 02 Dec 2024, Animesh Manna <animesh.manna@intel.com> wrote: > Enablement of LOBF is added in post plane update whenever > has_lobf flag is set. As LOBF can be enabled in non-psr > case as well so adding in post plane update. There is no > change of configuring alpm with psr path. > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_alpm.c | 19 +++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++++ > drivers/gpu/drm/i915/display/intel_display.c | 3 +++ > 3 files changed, 26 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c > index 55f3ae1e68c9..45865a8d1dd2 100644 > --- a/drivers/gpu/drm/i915/display/intel_alpm.c > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c > @@ -367,6 +367,25 @@ void intel_alpm_configure(struct intel_dp *intel_dp, > lnl_alpm_configure(intel_dp, crtc_state); > } > > +void intel_alpm_post_plane_update(struct intel_atomic_state *state, > + struct intel_crtc *crtc) > +{ > + struct intel_display *display = to_intel_display(state); > + const struct intel_crtc_state *crtc_state = > + intel_atomic_get_new_crtc_state(state, crtc); > + struct intel_encoder *encoder; > + > + if (!crtc_state->has_lobf) > + return; > + > + for_each_intel_dp(display->drm, encoder) { > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); > + > + if (intel_dp_is_edp(intel_dp)) > + intel_alpm_configure(intel_dp, crtc_state); This gets called on all eDP, regardless of whether they have anything to do with the crtc state. BR, Jani. > + } > +} > + > static int i915_edp_lobf_info_show(struct seq_file *m, void *data) > { > struct intel_connector *connector = m->private; > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h > index 8c409b10dce6..2f862b0476a8 100644 > --- a/drivers/gpu/drm/i915/display/intel_alpm.h > +++ b/drivers/gpu/drm/i915/display/intel_alpm.h > @@ -12,6 +12,8 @@ struct intel_dp; > struct intel_crtc_state; > struct drm_connector_state; > struct intel_connector; > +struct intel_atomic_state; > +struct intel_crtc; > > void intel_alpm_init_dpcd(struct intel_dp *intel_dp); > bool intel_alpm_compute_params(struct intel_dp *intel_dp, > @@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, > struct drm_connector_state *conn_state); > void intel_alpm_configure(struct intel_dp *intel_dp, > const struct intel_crtc_state *crtc_state); > +void intel_alpm_post_plane_update(struct intel_atomic_state *state, > + struct intel_crtc *crtc); > void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); > bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); > bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index a0351c97c445..d279029e90f6 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -55,6 +55,7 @@ > #include "i9xx_plane.h" > #include "i9xx_plane_regs.h" > #include "i9xx_wm.h" > +#include "intel_alpm.h" > #include "intel_atomic.h" > #include "intel_atomic_plane.h" > #include "intel_audio.h" > @@ -1185,6 +1186,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, > > intel_psr_post_plane_update(state, crtc); > > + intel_alpm_post_plane_update(state, crtc); > + > intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); > > if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 55f3ae1e68c9..45865a8d1dd2 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -367,6 +367,25 @@ void intel_alpm_configure(struct intel_dp *intel_dp, lnl_alpm_configure(intel_dp, crtc_state); } +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(state); + const struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_encoder *encoder; + + if (!crtc_state->has_lobf) + return; + + for_each_intel_dp(display->drm, encoder) { + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + if (intel_dp_is_edp(intel_dp)) + intel_alpm_configure(intel_dp, crtc_state); + } +} + static int i915_edp_lobf_info_show(struct seq_file *m, void *data) { struct intel_connector *connector = m->private; diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 8c409b10dce6..2f862b0476a8 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -12,6 +12,8 @@ struct intel_dp; struct intel_crtc_state; struct drm_connector_state; struct intel_connector; +struct intel_atomic_state; +struct intel_crtc; void intel_alpm_init_dpcd(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, @@ -21,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, struct drm_connector_state *conn_state); void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); +void intel_alpm_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a0351c97c445..d279029e90f6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -55,6 +55,7 @@ #include "i9xx_plane.h" #include "i9xx_plane_regs.h" #include "i9xx_wm.h" +#include "intel_alpm.h" #include "intel_atomic.h" #include "intel_atomic_plane.h" #include "intel_audio.h" @@ -1185,6 +1186,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, intel_psr_post_plane_update(state, crtc); + intel_alpm_post_plane_update(state, crtc); + intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); if (new_crtc_state->update_wm_post && new_crtc_state->hw.active)
Enablement of LOBF is added in post plane update whenever has_lobf flag is set. As LOBF can be enabled in non-psr case as well so adding in post plane update. There is no change of configuring alpm with psr path. Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_alpm.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++++ drivers/gpu/drm/i915/display/intel_display.c | 3 +++ 3 files changed, 26 insertions(+)