| Message ID | 20241209-no_3dmux-v3-1-48aaa555b0d3@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | [v3] drm/msm/dpu: filter out too wide modes if no 3dmux is present | expand |
On Mon, Dec 09, 2024 at 01:18:36PM -0800, Abhinav Kumar wrote: > On chipsets such as QCS615, there is no 3dmux present. In such > a case, a layer exceeding the max_mixer_width cannot be split, > hence cannot be supported. > > Filter out the modes which exceed the max_mixer_width when there > is no 3dmux present. Also, add a check in the dpu_crtc_atomic_check() > to return failure for such modes. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > Note: this was only compile tested, so its pending validation on QCS615 > --- > Changes in v3: > - Move && to previous line > - Link to v2: https://lore.kernel.org/r/20241209-no_3dmux-v2-1-fcad057eb92e@quicinc.com > > Changes in v2: > - replace MODE_BAD with MODE_BAD_HVALUE to indicate the failure better > - Link to v1: https://lore.kernel.org/r/20241206-no_3dmux-v1-1-72ad2677a323@quicinc.com > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 12/10/2024 5:18 AM, Abhinav Kumar wrote: > On chipsets such as QCS615, there is no 3dmux present. In such > a case, a layer exceeding the max_mixer_width cannot be split, > hence cannot be supported. > > Filter out the modes which exceed the max_mixer_width when there > is no 3dmux present. Also, add a check in the dpu_crtc_atomic_check() > to return failure for such modes. > > Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> > --- > Note: this was only compile tested, so its pending validation on QCS615 > --- > Changes in v3: > - Move && to previous line > - Link to v2: https://lore.kernel.org/r/20241209-no_3dmux-v2-1-fcad057eb92e@quicinc.com > > Changes in v2: > - replace MODE_BAD with MODE_BAD_HVALUE to indicate the failure better > - Link to v1: https://lore.kernel.org/r/20241206-no_3dmux-v1-1-72ad2677a323@quicinc.com > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > Tested-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> # QCS615 > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index 9f6ffd344693ecfb633095772a31ada5613345dc..ad3462476a143ec01a3b8817a2c85b0f50435a9e 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -732,6 +732,13 @@ static int _dpu_crtc_check_and_setup_lm_bounds(struct drm_crtc *crtc, > struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); > int i; > > + /* if we cannot merge 2 LMs (no 3d mux) better to fail earlier > + * before even checking the width after the split > + */ > + if (!dpu_kms->catalog->caps->has_3d_merge && > + adj_mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) > + return -E2BIG; > + > for (i = 0; i < cstate->num_mixers; i++) { > struct drm_rect *r = &cstate->lm_bounds[i]; > r->x1 = crtc_split_width * i; > @@ -1251,6 +1258,12 @@ static enum drm_mode_status dpu_crtc_mode_valid(struct drm_crtc *crtc, > { > struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); > > + /* if there is no 3d_mux block we cannot merge LMs so we cannot > + * split the large layer into 2 LMs, filter out such modes > + */ > + if (!dpu_kms->catalog->caps->has_3d_merge && > + mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) > + return MODE_BAD_HVALUE; > /* > * max crtc width is equal to the max mixer width * 2 and max height is 4K > */ > > --- > base-commit: af2ea8ab7a546b430726183458da0a173d331272 > change-id: 20241206-no_3dmux-521a55ea0669 > > Best regards,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 9f6ffd344693ecfb633095772a31ada5613345dc..ad3462476a143ec01a3b8817a2c85b0f50435a9e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -732,6 +732,13 @@ static int _dpu_crtc_check_and_setup_lm_bounds(struct drm_crtc *crtc, struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); int i; + /* if we cannot merge 2 LMs (no 3d mux) better to fail earlier + * before even checking the width after the split + */ + if (!dpu_kms->catalog->caps->has_3d_merge && + adj_mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) + return -E2BIG; + for (i = 0; i < cstate->num_mixers; i++) { struct drm_rect *r = &cstate->lm_bounds[i]; r->x1 = crtc_split_width * i; @@ -1251,6 +1258,12 @@ static enum drm_mode_status dpu_crtc_mode_valid(struct drm_crtc *crtc, { struct dpu_kms *dpu_kms = _dpu_crtc_get_kms(crtc); + /* if there is no 3d_mux block we cannot merge LMs so we cannot + * split the large layer into 2 LMs, filter out such modes + */ + if (!dpu_kms->catalog->caps->has_3d_merge && + mode->hdisplay > dpu_kms->catalog->caps->max_mixer_width) + return MODE_BAD_HVALUE; /* * max crtc width is equal to the max mixer width * 2 and max height is 4K */
On chipsets such as QCS615, there is no 3dmux present. In such a case, a layer exceeding the max_mixer_width cannot be split, hence cannot be supported. Filter out the modes which exceed the max_mixer_width when there is no 3dmux present. Also, add a check in the dpu_crtc_atomic_check() to return failure for such modes. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> --- Note: this was only compile tested, so its pending validation on QCS615 --- Changes in v3: - Move && to previous line - Link to v2: https://lore.kernel.org/r/20241209-no_3dmux-v2-1-fcad057eb92e@quicinc.com Changes in v2: - replace MODE_BAD with MODE_BAD_HVALUE to indicate the failure better - Link to v1: https://lore.kernel.org/r/20241206-no_3dmux-v1-1-72ad2677a323@quicinc.com --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) --- base-commit: af2ea8ab7a546b430726183458da0a173d331272 change-id: 20241206-no_3dmux-521a55ea0669 Best regards,