| Message ID | 20241213-sparx5-lan969x-switch-driver-4-v4-5-d1a72c9c4714@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | net: lan969x: add RGMII support | expand |
On Fri, Dec 13, 2024 at 02:41:04PM +0100, Daniel Machon wrote: > The RGMII ports have no PCS to configure. Make sure we only return the > PCS for port modes that require it. > > Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Thanks!
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c b/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c index f8562c1a894d..035d2f1bea0d 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c @@ -32,7 +32,19 @@ sparx5_phylink_mac_select_pcs(struct phylink_config *config, { struct sparx5_port *port = netdev_priv(to_net_dev(config->dev)); - return &port->phylink_pcs; + /* Return the PCS for all the modes that require it. */ + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_QSGMII: + case PHY_INTERFACE_MODE_1000BASEX: + case PHY_INTERFACE_MODE_2500BASEX: + case PHY_INTERFACE_MODE_5GBASER: + case PHY_INTERFACE_MODE_10GBASER: + case PHY_INTERFACE_MODE_25GBASER: + return &port->phylink_pcs; + default: + return NULL; + } } static void sparx5_phylink_mac_config(struct phylink_config *config,
The RGMII ports have no PCS to configure. Make sure we only return the PCS for port modes that require it. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> --- drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-)