diff mbox series

dt-bindings: interrupt-controller: arm,gic: Correct VGIC interrupt description

Message ID 20241217061226.14139-1-krzysztof.kozlowski@linaro.org (mailing list archive)
State New
Headers show
Series dt-bindings: interrupt-controller: arm,gic: Correct VGIC interrupt description | expand

Commit Message

Krzysztof Kozlowski Dec. 17, 2024, 6:12 a.m. UTC
The description of VGIC interrupt referenced obsolete "see below" after
converting TXT to DT Schema in commit 66ed144f147a ("dt-bindings:
interrupt-controller: Convert ARM GIC to json-schema"), because there is
no dedicated "VGIC" chapter anymore below.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../devicetree/bindings/interrupt-controller/arm,gic.yaml     | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Marc Zyngier Dec. 17, 2024, 8:13 a.m. UTC | #1
On Tue, 17 Dec 2024 06:12:26 +0000,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
> 
> The description of VGIC interrupt referenced obsolete "see below" after
> converting TXT to DT Schema in commit 66ed144f147a ("dt-bindings:
> interrupt-controller: Convert ARM GIC to json-schema"), because there is
> no dedicated "VGIC" chapter anymore below.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/interrupt-controller/arm,gic.yaml     | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> index a2846e493497..7173c4b5a228 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> @@ -110,8 +110,8 @@ properties:
>  
>    interrupts:
>      description: Interrupt source of the parent interrupt controller on
> -      secondary GICs, or VGIC maintenance interrupt on primary GIC (see
> -      below).
> +      secondary GICs, or VGIC maintenance interrupt on primary GIC (see "GICv2
> +      with virtualization extensions" paragraph in the "reg" property).
>      maxItems: 1
>  
>    cpu-offset:

Acked-by: Marc Zyngier <maz@kernel.org>

	M.
Conor Dooley Dec. 17, 2024, 6:23 p.m. UTC | #2
On Tue, Dec 17, 2024 at 07:12:26AM +0100, Krzysztof Kozlowski wrote:
> The description of VGIC interrupt referenced obsolete "see below" after
> converting TXT to DT Schema in commit 66ed144f147a ("dt-bindings:
> interrupt-controller: Convert ARM GIC to json-schema"), because there is
> no dedicated "VGIC" chapter anymore below.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  .../devicetree/bindings/interrupt-controller/arm,gic.yaml     | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> index a2846e493497..7173c4b5a228 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
> @@ -110,8 +110,8 @@ properties:
>  
>    interrupts:
>      description: Interrupt source of the parent interrupt controller on
> -      secondary GICs, or VGIC maintenance interrupt on primary GIC (see
> -      below).
> +      secondary GICs, or VGIC maintenance interrupt on primary GIC (see "GICv2
> +      with virtualization extensions" paragraph in the "reg" property).

I don't think things like this /should/ need a dt ack, even if they
weren't from a dt maintainer - but in case one's expected
Acked-by: Conor Dooley <conor.dooley@microchip.com>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
index a2846e493497..7173c4b5a228 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
@@ -110,8 +110,8 @@  properties:
 
   interrupts:
     description: Interrupt source of the parent interrupt controller on
-      secondary GICs, or VGIC maintenance interrupt on primary GIC (see
-      below).
+      secondary GICs, or VGIC maintenance interrupt on primary GIC (see "GICv2
+      with virtualization extensions" paragraph in the "reg" property).
     maxItems: 1
 
   cpu-offset: