| Message ID | 20241218114442.137884-4-a0987203069@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add support for Nuvoton MA35D1 GMAC | expand |
On 12/18/24 12:44, Joey Lu wrote: > Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac driver. > > Signed-off-by: Joey Lu <a0987203069@gmail.com> > --- > drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++ > drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + > .../ethernet/stmicro/stmmac/dwmac-nuvoton.c | 182 ++++++++++++++++++ > 3 files changed, 194 insertions(+) > create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c > > diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig > index 6658536a4e17..c8cbc0ec1311 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig > +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig > @@ -121,6 +121,17 @@ config DWMAC_MESON > the stmmac device driver. This driver is used for Meson6, > Meson8, Meson8b and GXBB SoCs. > > +config DWMAC_NUVOTON > + tristate "Nuvoton MA35 dwmac support" > + default ARCH_MA35 > + depends on OF && (ARCH_MA35 || COMPILE_TEST) > + select MFD_SYSCON > + help > + Support for Ethernet controller on Nuvoton MA35 series SoC. > + > + This selects the Nuvoton MA35 series SoC glue layer support > + for the stmmac device driver. > + > config DWMAC_QCOM_ETHQOS > tristate "Qualcomm ETHQOS support" > default ARCH_QCOM > diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile > index 2389fd261344..9812b824459f 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/Makefile > +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile > @@ -19,6 +19,7 @@ obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o > obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o > obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o > obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o > +obj-$(CONFIG_DWMAC_NUVOTON) += dwmac-nuvoton.o > obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o > obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o > obj-$(CONFIG_DWMAC_RZN1) += dwmac-rzn1.o > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c > new file mode 100644 > index 000000000000..c5b8933c1f44 > --- /dev/null > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c > @@ -0,0 +1,182 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Nuvoton DWMAC specific glue layer > + * > + * Copyright (C) 2024 Nuvoton Technology Corp. > + * > + * Author: Joey Lu <yclu4@nuvoton.com> > + */ > + > +#include <linux/mfd/syscon.h> > +#include <linux/of_device.h> > +#include <linux/of_net.h> > +#include <linux/platform_device.h> > +#include <linux/regmap.h> > +#include <linux/stmmac.h> > + > +#include "stmmac.h" > +#include "stmmac_platform.h" > + > +#define REG_SYS_GMAC0MISCR 0x108 > +#define REG_SYS_GMAC1MISCR 0x10C > + > +#define MISCR_RMII BIT(0) > + > +/* 2000ps is mapped to 0 ~ 0xF */ > +#define PATH_DELAY_DEC 134 would be great to previx your macros by NVT_ why 134 and not 125? > +#define TX_DELAY_OFFSET 16 please remove and replace the usage point by FIELD_PREP() > +#define TX_DELAY_MASK GENMASK(19, 16) > +#define RX_DELAY_OFFSET 20 ditto > +#define RX_DELAY_MASK GENMASK(23, 20) > + > +struct nvt_priv_data { > + struct platform_device *pdev; > + struct regmap *regmap; > +}; > + > +static struct nvt_priv_data * > +nuvoton_gmac_setup(struct platform_device *pdev, struct plat_stmmacenet_data *plat) please stick to one previx for all functions, structs, and defines, NVT/nvt looks good s/nuvoton/nvt/ > +{ > + struct device *dev = &pdev->dev; > + struct nvt_priv_data *bsp_priv; > + phy_interface_t phy_mode; > + u32 tx_delay, rx_delay; > + u32 macid, arg, reg; > + > + bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL); > + if (!bsp_priv) > + return ERR_PTR(-ENOMEM); > + > + bsp_priv->regmap = > + syscon_regmap_lookup_by_phandle_args(dev->of_node, "nuvoton,sys", 1, &macid); > + if (IS_ERR(bsp_priv->regmap)) { > + dev_err_probe(dev, PTR_ERR(bsp_priv->regmap), "Failed to get sys register\n"); > + return ERR_PTR(-ENODEV); > + } > + if (macid > 1) { > + dev_err_probe(dev, -EINVAL, "Invalid sys arguments\n"); > + return ERR_PTR(-EINVAL); > + } > + > + if (of_property_read_u32(dev->of_node, "tx-internal-delay-ps", &arg)) { > + tx_delay = 0; /* Default value is 0 */ please remove obvious comments > + } else { > + if (arg <= 2000) { > + tx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); > + dev_dbg(dev, "Set Tx path delay to 0x%x\n", tx_delay); > + } else { > + dev_err(dev, "Invalid Tx path delay argument.\n"); > + return ERR_PTR(-EINVAL); > + } > + } > + if (of_property_read_u32(dev->of_node, "rx-internal-delay-ps", &arg)) { > + rx_delay = 0; /* Default value is 0 */ > + } else { > + if (arg <= 2000) { > + rx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); > + dev_dbg(dev, "Set Rx path delay to 0x%x\n", rx_delay); > + } else { > + dev_err(dev, "Invalid Rx path delay argument.\n"); > + return ERR_PTR(-EINVAL); > + } > + } > + > + regmap_read(bsp_priv->regmap, > + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, ®); > + reg &= ~(TX_DELAY_MASK | RX_DELAY_MASK); > + > + if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) { > + dev_err(dev, "missing phy mode property\n"); > + return ERR_PTR(-EINVAL); > + } > + > + switch (phy_mode) { > + case PHY_INTERFACE_MODE_RGMII: > + case PHY_INTERFACE_MODE_RGMII_ID: > + case PHY_INTERFACE_MODE_RGMII_RXID: > + case PHY_INTERFACE_MODE_RGMII_TXID: > + reg &= ~MISCR_RMII; > + break; > + case PHY_INTERFACE_MODE_RMII: > + reg |= MISCR_RMII; > + break; > + default: > + dev_err(dev, "Unsupported phy-mode (%d)\n", phy_mode); > + return ERR_PTR(-EINVAL); > + } > + > + if (!(reg & MISCR_RMII)) { > + reg |= tx_delay << TX_DELAY_OFFSET; > + reg |= rx_delay << RX_DELAY_OFFSET; > + } > + > + regmap_write(bsp_priv->regmap, > + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, reg); > + > + bsp_priv->pdev = pdev; > + > + return bsp_priv; > +} > + > +static int nuvoton_gmac_probe(struct platform_device *pdev) > +{ > + struct plat_stmmacenet_data *plat_dat; > + struct stmmac_resources stmmac_res; > + int ret; > + > + ret = stmmac_get_platform_resources(pdev, &stmmac_res); > + if (ret) > + return ret; > + > + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); > + if (IS_ERR(plat_dat)) > + return PTR_ERR(plat_dat); > + > + /* Nuvoton DWMAC configs */ > + plat_dat->has_gmac = 1; > + plat_dat->tx_fifo_size = 2048; > + plat_dat->rx_fifo_size = 4096; > + plat_dat->multicast_filter_bins = 0; > + plat_dat->unicast_filter_entries = 8; > + plat_dat->flags &= ~STMMAC_FLAG_USE_PHY_WOL; > + > + plat_dat->bsp_priv = nuvoton_gmac_setup(pdev, plat_dat); would be great to extend plat_stmmacenet_data allocation to allocate also the space for the priv data - but this is outside of the scope of this patchset > + if (IS_ERR(plat_dat->bsp_priv)) { > + ret = PTR_ERR(plat_dat->bsp_priv); > + return ret; just return PTR_ERR(...) > + } > + > + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); > + if (ret) > + return ret; > + > + /* The PMT flag is determined by the RWK property. > + * However, our hardware is configured to support only MGK. > + * This is an override on PMT to enable WoL capability. > + */ > + plat_dat->pmt = 1; > + device_set_wakeup_capable(&pdev->dev, 1); > + > + return 0; > +} > + > +static const struct of_device_id nuvoton_dwmac_match[] = { > + { .compatible = "nuvoton,ma35d1-dwmac"}, > + { } > +}; > +MODULE_DEVICE_TABLE(of, nuvoton_dwmac_match); > + > +static struct platform_driver nuvoton_dwmac_driver = { > + .probe = nuvoton_gmac_probe, > + .remove = stmmac_pltfr_remove, > + .driver = { > + .name = "nuvoton-dwmac", > + .pm = &stmmac_pltfr_pm_ops, > + .of_match_table = nuvoton_dwmac_match, > + }, > +}; > +module_platform_driver(nuvoton_dwmac_driver); > + > +MODULE_AUTHOR("Joey Lu <yclu4@nuvoton.com>"); > +MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer"); > +MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 6658536a4e17..c8cbc0ec1311 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -121,6 +121,17 @@ config DWMAC_MESON the stmmac device driver. This driver is used for Meson6, Meson8, Meson8b and GXBB SoCs. +config DWMAC_NUVOTON + tristate "Nuvoton MA35 dwmac support" + default ARCH_MA35 + depends on OF && (ARCH_MA35 || COMPILE_TEST) + select MFD_SYSCON + help + Support for Ethernet controller on Nuvoton MA35 series SoC. + + This selects the Nuvoton MA35 series SoC glue layer support + for the stmmac device driver. + config DWMAC_QCOM_ETHQOS tristate "Qualcomm ETHQOS support" default ARCH_QCOM diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index 2389fd261344..9812b824459f 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o obj-$(CONFIG_DWMAC_MEDIATEK) += dwmac-mediatek.o obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o dwmac-meson8b.o +obj-$(CONFIG_DWMAC_NUVOTON) += dwmac-nuvoton.o obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o obj-$(CONFIG_DWMAC_RZN1) += dwmac-rzn1.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c new file mode 100644 index 000000000000..c5b8933c1f44 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c @@ -0,0 +1,182 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Nuvoton DWMAC specific glue layer + * + * Copyright (C) 2024 Nuvoton Technology Corp. + * + * Author: Joey Lu <yclu4@nuvoton.com> + */ + +#include <linux/mfd/syscon.h> +#include <linux/of_device.h> +#include <linux/of_net.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> +#include <linux/stmmac.h> + +#include "stmmac.h" +#include "stmmac_platform.h" + +#define REG_SYS_GMAC0MISCR 0x108 +#define REG_SYS_GMAC1MISCR 0x10C + +#define MISCR_RMII BIT(0) + +/* 2000ps is mapped to 0 ~ 0xF */ +#define PATH_DELAY_DEC 134 +#define TX_DELAY_OFFSET 16 +#define TX_DELAY_MASK GENMASK(19, 16) +#define RX_DELAY_OFFSET 20 +#define RX_DELAY_MASK GENMASK(23, 20) + +struct nvt_priv_data { + struct platform_device *pdev; + struct regmap *regmap; +}; + +static struct nvt_priv_data * +nuvoton_gmac_setup(struct platform_device *pdev, struct plat_stmmacenet_data *plat) +{ + struct device *dev = &pdev->dev; + struct nvt_priv_data *bsp_priv; + phy_interface_t phy_mode; + u32 tx_delay, rx_delay; + u32 macid, arg, reg; + + bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL); + if (!bsp_priv) + return ERR_PTR(-ENOMEM); + + bsp_priv->regmap = + syscon_regmap_lookup_by_phandle_args(dev->of_node, "nuvoton,sys", 1, &macid); + if (IS_ERR(bsp_priv->regmap)) { + dev_err_probe(dev, PTR_ERR(bsp_priv->regmap), "Failed to get sys register\n"); + return ERR_PTR(-ENODEV); + } + if (macid > 1) { + dev_err_probe(dev, -EINVAL, "Invalid sys arguments\n"); + return ERR_PTR(-EINVAL); + } + + if (of_property_read_u32(dev->of_node, "tx-internal-delay-ps", &arg)) { + tx_delay = 0; /* Default value is 0 */ + } else { + if (arg <= 2000) { + tx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); + dev_dbg(dev, "Set Tx path delay to 0x%x\n", tx_delay); + } else { + dev_err(dev, "Invalid Tx path delay argument.\n"); + return ERR_PTR(-EINVAL); + } + } + if (of_property_read_u32(dev->of_node, "rx-internal-delay-ps", &arg)) { + rx_delay = 0; /* Default value is 0 */ + } else { + if (arg <= 2000) { + rx_delay = (arg == 2000) ? 0xF : (arg / PATH_DELAY_DEC); + dev_dbg(dev, "Set Rx path delay to 0x%x\n", rx_delay); + } else { + dev_err(dev, "Invalid Rx path delay argument.\n"); + return ERR_PTR(-EINVAL); + } + } + + regmap_read(bsp_priv->regmap, + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, ®); + reg &= ~(TX_DELAY_MASK | RX_DELAY_MASK); + + if (of_get_phy_mode(pdev->dev.of_node, &phy_mode)) { + dev_err(dev, "missing phy mode property\n"); + return ERR_PTR(-EINVAL); + } + + switch (phy_mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + reg &= ~MISCR_RMII; + break; + case PHY_INTERFACE_MODE_RMII: + reg |= MISCR_RMII; + break; + default: + dev_err(dev, "Unsupported phy-mode (%d)\n", phy_mode); + return ERR_PTR(-EINVAL); + } + + if (!(reg & MISCR_RMII)) { + reg |= tx_delay << TX_DELAY_OFFSET; + reg |= rx_delay << RX_DELAY_OFFSET; + } + + regmap_write(bsp_priv->regmap, + macid == 0 ? REG_SYS_GMAC0MISCR : REG_SYS_GMAC1MISCR, reg); + + bsp_priv->pdev = pdev; + + return bsp_priv; +} + +static int nuvoton_gmac_probe(struct platform_device *pdev) +{ + struct plat_stmmacenet_data *plat_dat; + struct stmmac_resources stmmac_res; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return ret; + + plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat_dat)) + return PTR_ERR(plat_dat); + + /* Nuvoton DWMAC configs */ + plat_dat->has_gmac = 1; + plat_dat->tx_fifo_size = 2048; + plat_dat->rx_fifo_size = 4096; + plat_dat->multicast_filter_bins = 0; + plat_dat->unicast_filter_entries = 8; + plat_dat->flags &= ~STMMAC_FLAG_USE_PHY_WOL; + + plat_dat->bsp_priv = nuvoton_gmac_setup(pdev, plat_dat); + if (IS_ERR(plat_dat->bsp_priv)) { + ret = PTR_ERR(plat_dat->bsp_priv); + return ret; + } + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) + return ret; + + /* The PMT flag is determined by the RWK property. + * However, our hardware is configured to support only MGK. + * This is an override on PMT to enable WoL capability. + */ + plat_dat->pmt = 1; + device_set_wakeup_capable(&pdev->dev, 1); + + return 0; +} + +static const struct of_device_id nuvoton_dwmac_match[] = { + { .compatible = "nuvoton,ma35d1-dwmac"}, + { } +}; +MODULE_DEVICE_TABLE(of, nuvoton_dwmac_match); + +static struct platform_driver nuvoton_dwmac_driver = { + .probe = nuvoton_gmac_probe, + .remove = stmmac_pltfr_remove, + .driver = { + .name = "nuvoton-dwmac", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = nuvoton_dwmac_match, + }, +}; +module_platform_driver(nuvoton_dwmac_driver); + +MODULE_AUTHOR("Joey Lu <yclu4@nuvoton.com>"); +MODULE_DESCRIPTION("Nuvoton DWMAC specific glue layer"); +MODULE_LICENSE("GPL v2");
Add support for Gigabit Ethernet on Nuvoton MA35 series using dwmac driver. Signed-off-by: Joey Lu <a0987203069@gmail.com> --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 ++ drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + .../ethernet/stmicro/stmmac/dwmac-nuvoton.c | 182 ++++++++++++++++++ 3 files changed, 194 insertions(+) create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-nuvoton.c