| Message ID | 20241229152332.3068172-6-quic_wasimn@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: qcom: Add support for QCS9075 boards | expand |
On 29.12.2024 4:23 PM, Wasim Nazir wrote: > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > subsystem which is available in QCS9100, and it affects thermal > management. > > Also, between ride and ride-r3 ethernet phy is different. > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > --- + Andrew IIUC we have a similar case to https://lore.kernel.org/linux-arm-msm/cbd696c0-3b25-438b-a279-a4263308323a@lunn.ch/ here in the first file changed, please see below and let me know if the rest makes sense for the networking part Konrad > arch/arm64/boot/dts/qcom/Makefile | 2 + > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > 3 files changed, 94 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 78613a1bd34a..41cb2bbd3472 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > new file mode 100644 > index 000000000000..d9a8956d3a76 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > @@ -0,0 +1,46 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > + > +#include "sa8775p-ride.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > +}; > + > +ðernet0 { > + phy-mode = "2500base-x"; > +}; > + > +ðernet1 { > + phy-mode = "2500base-x"; > +}; > + > +&mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + sgmii_phy0: phy@8 { > + compatible = "ethernet-phy-id31c3.1c33"; > + reg = <0x8>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + > + sgmii_phy1: phy@0 { > + compatible = "ethernet-phy-id31c3.1c33"; > + reg = <0x0>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > new file mode 100644 > index 000000000000..3b524359a72d > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > @@ -0,0 +1,46 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > + > +#include "sa8775p-ride.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > +}; > + > +ðernet0 { > + phy-mode = "sgmii"; > +}; > + > +ðernet1 { > + phy-mode = "sgmii"; > +}; > + > +&mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + sgmii_phy0: phy@8 { > + compatible = "ethernet-phy-id0141.0dd4"; > + reg = <0x8>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + > + sgmii_phy1: phy@a { > + compatible = "ethernet-phy-id0141.0dd4"; > + reg = <0xa>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > +}; > -- > 2.47.0 >
On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > subsystem which is available in QCS9100, and it affects thermal > management. > > Also, between ride and ride-r3 ethernet phy is different. > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just include corresponding SA8775P files. This is not ideal for the following reasons: - The approach is not uniform (between QCS9100 and QCS9075), which might lead to mistakes. - The approach ends up duplicating DT code unnecessarily, which can lead to issues being patches in the one board file, but not in the other file. If there are any reasons why you want to follow this approach, they must be a part of the commit message. > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > --- > arch/arm64/boot/dts/qcom/Makefile | 2 + > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > 3 files changed, 94 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index 78613a1bd34a..41cb2bbd3472 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > new file mode 100644 > index 000000000000..d9a8956d3a76 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > @@ -0,0 +1,46 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > + > +#include "sa8775p-ride.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > +}; > + > +ðernet0 { > + phy-mode = "2500base-x"; > +}; > + > +ðernet1 { > + phy-mode = "2500base-x"; > +}; > + > +&mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + sgmii_phy0: phy@8 { > + compatible = "ethernet-phy-id31c3.1c33"; > + reg = <0x8>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + > + sgmii_phy1: phy@0 { > + compatible = "ethernet-phy-id31c3.1c33"; > + reg = <0x0>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > new file mode 100644 > index 000000000000..3b524359a72d > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > @@ -0,0 +1,46 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > + */ > +/dts-v1/; > + > +#include "sa8775p-ride.dtsi" > + > +/ { > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > +}; > + > +ðernet0 { > + phy-mode = "sgmii"; > +}; > + > +ðernet1 { > + phy-mode = "sgmii"; > +}; > + > +&mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + sgmii_phy0: phy@8 { > + compatible = "ethernet-phy-id0141.0dd4"; > + reg = <0x8>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > + > + sgmii_phy1: phy@a { > + compatible = "ethernet-phy-id0141.0dd4"; > + reg = <0xa>; > + device_type = "ethernet-phy"; > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > + reset-assert-us = <11000>; > + reset-deassert-us = <70000>; > + }; > +}; > -- > 2.47.0 >
> > +ðernet0 { > > + phy-mode = "2500base-x"; > > +}; > > + > > +ðernet1 { > > + phy-mode = "2500base-x"; > > +}; > > + > > +&mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + sgmii_phy0: phy@8 { > > + compatible = "ethernet-phy-id31c3.1c33"; > > + reg = <0x8>; > > + device_type = "ethernet-phy"; > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <11000>; > > + reset-deassert-us = <70000>; > > + }; > > + > > + sgmii_phy1: phy@0 { SGMII is 10/100/1000. You have a phy-mode of 2500base-x, which is only 2500. So calling this sgmii_phy is wrong. Just call it phy1: phy@0. Andrew
On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > subsystem which is available in QCS9100, and it affects thermal > > management. > > > > Also, between ride and ride-r3 ethernet phy is different. > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > include corresponding SA8775P files. > > This is not ideal for the following reasons: > - The approach is not uniform (between QCS9100 and QCS9075), which might > lead to mistakes. > - The approach ends up duplicating DT code unnecessarily, which can lead > to issues being patches in the one board file, but not in the other > file. > > If there are any reasons why you want to follow this approach, they must > be a part of the commit message. > Hi Dmitry, Initially, we included the DTS [1] file to avoid duplication. However, based on Krzysztof's previous suggestion [2], we change to this format. Please let us know how to proceed further on this. [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > --- > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > 3 files changed, 94 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > index 78613a1bd34a..41cb2bbd3472 100644 > > --- a/arch/arm64/boot/dts/qcom/Makefile > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > new file mode 100644 > > index 000000000000..d9a8956d3a76 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > @@ -0,0 +1,46 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > +/dts-v1/; > > + > > +#include "sa8775p-ride.dtsi" > > + > > +/ { > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > +}; > > + > > +ðernet0 { > > + phy-mode = "2500base-x"; > > +}; > > + > > +ðernet1 { > > + phy-mode = "2500base-x"; > > +}; > > + > > +&mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + sgmii_phy0: phy@8 { > > + compatible = "ethernet-phy-id31c3.1c33"; > > + reg = <0x8>; > > + device_type = "ethernet-phy"; > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <11000>; > > + reset-deassert-us = <70000>; > > + }; > > + > > + sgmii_phy1: phy@0 { > > + compatible = "ethernet-phy-id31c3.1c33"; > > + reg = <0x0>; > > + device_type = "ethernet-phy"; > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <11000>; > > + reset-deassert-us = <70000>; > > + }; > > +}; > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > new file mode 100644 > > index 000000000000..3b524359a72d > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > @@ -0,0 +1,46 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > + */ > > +/dts-v1/; > > + > > +#include "sa8775p-ride.dtsi" > > + > > +/ { > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > +}; > > + > > +ðernet0 { > > + phy-mode = "sgmii"; > > +}; > > + > > +ðernet1 { > > + phy-mode = "sgmii"; > > +}; > > + > > +&mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + sgmii_phy0: phy@8 { > > + compatible = "ethernet-phy-id0141.0dd4"; > > + reg = <0x8>; > > + device_type = "ethernet-phy"; > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <11000>; > > + reset-deassert-us = <70000>; > > + }; > > + > > + sgmii_phy1: phy@a { > > + compatible = "ethernet-phy-id0141.0dd4"; > > + reg = <0xa>; > > + device_type = "ethernet-phy"; > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > + reset-assert-us = <11000>; > > + reset-deassert-us = <70000>; > > + }; > > +}; > > -- > > 2.47.0 > > > > -- > With best wishes > Dmitry Thanks & Regards, Wasim
On Tue, Dec 31, 2024 at 06:10:15AM +0100, Andrew Lunn wrote: > > > +ðernet0 { > > > + phy-mode = "2500base-x"; > > > +}; > > > + > > > +ðernet1 { > > > + phy-mode = "2500base-x"; > > > +}; > > > + > > > +&mdio { > > > + compatible = "snps,dwmac-mdio"; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + sgmii_phy0: phy@8 { > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > + reg = <0x8>; > > > + device_type = "ethernet-phy"; > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > + reset-assert-us = <11000>; > > > + reset-deassert-us = <70000>; > > > + }; > > > + > > > + sgmii_phy1: phy@0 { > > SGMII is 10/100/1000. You have a phy-mode of 2500base-x, which is only > 2500. So calling this sgmii_phy is wrong. Just call it phy1: phy@0. > Thanks Konrad/Andrew will fix this in next patch. Regards, Wasim
On Thu, Jan 02, 2025 at 02:37:39PM +0530, Wasim Nazir wrote: > On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > > subsystem which is available in QCS9100, and it affects thermal > > > management. > > > > > > Also, between ride and ride-r3 ethernet phy is different. > > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > > include corresponding SA8775P files. > > > > This is not ideal for the following reasons: > > - The approach is not uniform (between QCS9100 and QCS9075), which might > > lead to mistakes. > > - The approach ends up duplicating DT code unnecessarily, which can lead > > to issues being patches in the one board file, but not in the other > > file. > > > > If there are any reasons why you want to follow this approach, they must > > be a part of the commit message. > > > > Hi Dmitry, > > Initially, we included the DTS [1] file to avoid duplication. However, > based on Krzysztof's previous suggestion [2], we change to this format. > > Please let us know how to proceed further on this. Krzysztof asked you to include DTSI files instead of including DTS files. Hope this helps. > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > > --- > > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > > 3 files changed, 94 insertions(+) > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > > index 78613a1bd34a..41cb2bbd3472 100644 > > > --- a/arch/arm64/boot/dts/qcom/Makefile > > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > new file mode 100644 > > > index 000000000000..d9a8956d3a76 > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > @@ -0,0 +1,46 @@ > > > +// SPDX-License-Identifier: BSD-3-Clause > > > +/* > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > + */ > > > +/dts-v1/; > > > + > > > +#include "sa8775p-ride.dtsi" > > > + > > > +/ { > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > > +}; > > > + > > > +ðernet0 { > > > + phy-mode = "2500base-x"; > > > +}; > > > + > > > +ðernet1 { > > > + phy-mode = "2500base-x"; > > > +}; > > > + > > > +&mdio { > > > + compatible = "snps,dwmac-mdio"; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + sgmii_phy0: phy@8 { > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > + reg = <0x8>; > > > + device_type = "ethernet-phy"; > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > + reset-assert-us = <11000>; > > > + reset-deassert-us = <70000>; > > > + }; > > > + > > > + sgmii_phy1: phy@0 { > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > + reg = <0x0>; > > > + device_type = "ethernet-phy"; > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > + reset-assert-us = <11000>; > > > + reset-deassert-us = <70000>; > > > + }; > > > +}; > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > new file mode 100644 > > > index 000000000000..3b524359a72d > > > --- /dev/null > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > @@ -0,0 +1,46 @@ > > > +// SPDX-License-Identifier: BSD-3-Clause > > > +/* > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > + */ > > > +/dts-v1/; > > > + > > > +#include "sa8775p-ride.dtsi" > > > + > > > +/ { > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > > +}; > > > + > > > +ðernet0 { > > > + phy-mode = "sgmii"; > > > +}; > > > + > > > +ðernet1 { > > > + phy-mode = "sgmii"; > > > +}; > > > + > > > +&mdio { > > > + compatible = "snps,dwmac-mdio"; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + sgmii_phy0: phy@8 { > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > + reg = <0x8>; > > > + device_type = "ethernet-phy"; > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > + reset-assert-us = <11000>; > > > + reset-deassert-us = <70000>; > > > + }; > > > + > > > + sgmii_phy1: phy@a { > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > + reg = <0xa>; > > > + device_type = "ethernet-phy"; > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > + reset-assert-us = <11000>; > > > + reset-deassert-us = <70000>; > > > + }; > > > +}; > > > -- > > > 2.47.0 > > > > > > > -- > > With best wishes > > Dmitry > > > Thanks & Regards, > Wasim
On Fri, Jan 03, 2025 at 07:50:43AM +0200, Dmitry Baryshkov wrote: > On Thu, Jan 02, 2025 at 02:37:39PM +0530, Wasim Nazir wrote: > > On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > > > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > > > subsystem which is available in QCS9100, and it affects thermal > > > > management. > > > > > > > > Also, between ride and ride-r3 ethernet phy is different. > > > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > > > > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > > > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > > > include corresponding SA8775P files. > > > > > > This is not ideal for the following reasons: > > > - The approach is not uniform (between QCS9100 and QCS9075), which might > > > lead to mistakes. > > > - The approach ends up duplicating DT code unnecessarily, which can lead > > > to issues being patches in the one board file, but not in the other > > > file. > > > > > > If there are any reasons why you want to follow this approach, they must > > > be a part of the commit message. > > > > > > > Hi Dmitry, > > > > Initially, we included the DTS [1] file to avoid duplication. However, > > based on Krzysztof's previous suggestion [2], we change to this format. > > > > Please let us know how to proceed further on this. > > Krzysztof asked you to include DTSI files instead of including DTS > files. Hope this helps. Are you suggesting that we should also modify the 9100-ride files to include DTSI instead of DTS for consistency between QCS9100 and QCS9075? However, this would result in the duplication of Ethernet nodes in all the ride board files. Would that be acceptable? > > > > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > > > > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > > > --- > > > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > > > 3 files changed, 94 insertions(+) > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > > > index 78613a1bd34a..41cb2bbd3472 100644 > > > > --- a/arch/arm64/boot/dts/qcom/Makefile > > > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > new file mode 100644 > > > > index 000000000000..d9a8956d3a76 > > > > --- /dev/null > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > @@ -0,0 +1,46 @@ > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > +/* > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > + */ > > > > +/dts-v1/; > > > > + > > > > +#include "sa8775p-ride.dtsi" > > > > + > > > > +/ { > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > > > +}; > > > > + > > > > +ðernet0 { > > > > + phy-mode = "2500base-x"; > > > > +}; > > > > + > > > > +ðernet1 { > > > > + phy-mode = "2500base-x"; > > > > +}; > > > > + > > > > +&mdio { > > > > + compatible = "snps,dwmac-mdio"; > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + sgmii_phy0: phy@8 { > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > + reg = <0x8>; > > > > + device_type = "ethernet-phy"; > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > + reset-assert-us = <11000>; > > > > + reset-deassert-us = <70000>; > > > > + }; > > > > + > > > > + sgmii_phy1: phy@0 { > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > + reg = <0x0>; > > > > + device_type = "ethernet-phy"; > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > + reset-assert-us = <11000>; > > > > + reset-deassert-us = <70000>; > > > > + }; > > > > +}; > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > new file mode 100644 > > > > index 000000000000..3b524359a72d > > > > --- /dev/null > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > @@ -0,0 +1,46 @@ > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > +/* > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > + */ > > > > +/dts-v1/; > > > > + > > > > +#include "sa8775p-ride.dtsi" > > > > + > > > > +/ { > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > > > +}; > > > > + > > > > +ðernet0 { > > > > + phy-mode = "sgmii"; > > > > +}; > > > > + > > > > +ðernet1 { > > > > + phy-mode = "sgmii"; > > > > +}; > > > > + > > > > +&mdio { > > > > + compatible = "snps,dwmac-mdio"; > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + sgmii_phy0: phy@8 { > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > + reg = <0x8>; > > > > + device_type = "ethernet-phy"; > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > + reset-assert-us = <11000>; > > > > + reset-deassert-us = <70000>; > > > > + }; > > > > + > > > > + sgmii_phy1: phy@a { > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > + reg = <0xa>; > > > > + device_type = "ethernet-phy"; > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > + reset-assert-us = <11000>; > > > > + reset-deassert-us = <70000>; > > > > + }; > > > > +}; > > > > -- > > > > 2.47.0 > > > > > > > > > > -- > > > With best wishes > > > Dmitry > > > > > > Thanks & Regards, > > Wasim > > -- > With best wishes > Dmitry Thanks & Regards, Wasim
On Fri, Jan 03, 2025 at 12:37:50PM +0530, Wasim Nazir wrote: > On Fri, Jan 03, 2025 at 07:50:43AM +0200, Dmitry Baryshkov wrote: > > On Thu, Jan 02, 2025 at 02:37:39PM +0530, Wasim Nazir wrote: > > > On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > > > > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > > > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > > > > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > > > > subsystem which is available in QCS9100, and it affects thermal > > > > > management. > > > > > > > > > > Also, between ride and ride-r3 ethernet phy is different. > > > > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > > > > > > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > > > > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > > > > include corresponding SA8775P files. > > > > > > > > This is not ideal for the following reasons: > > > > - The approach is not uniform (between QCS9100 and QCS9075), which might > > > > lead to mistakes. > > > > - The approach ends up duplicating DT code unnecessarily, which can lead > > > > to issues being patches in the one board file, but not in the other > > > > file. > > > > > > > > If there are any reasons why you want to follow this approach, they must > > > > be a part of the commit message. > > > > > > > > > > Hi Dmitry, > > > > > > Initially, we included the DTS [1] file to avoid duplication. However, > > > based on Krzysztof's previous suggestion [2], we change to this format. > > > > > > Please let us know how to proceed further on this. > > > > Krzysztof asked you to include DTSI files instead of including DTS > > files. Hope this helps. > > Are you suggesting that we should also modify the 9100-ride files to > include DTSI instead of DTS for consistency between QCS9100 and QCS9075? > However, this would result in the duplication of Ethernet nodes in all > the ride board files. Would that be acceptable? git mv foo.dts foo.dtsi echo '#include "foo.dtsi"' > foo.dts git add foo.dts git commit > > > > > > > > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > > [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > > > > > > > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > > > > --- > > > > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > > > > 3 files changed, 94 insertions(+) > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > > > > index 78613a1bd34a..41cb2bbd3472 100644 > > > > > --- a/arch/arm64/boot/dts/qcom/Makefile > > > > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > > > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > > > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > new file mode 100644 > > > > > index 000000000000..d9a8956d3a76 > > > > > --- /dev/null > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > @@ -0,0 +1,46 @@ > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > +/* > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > + */ > > > > > +/dts-v1/; > > > > > + > > > > > +#include "sa8775p-ride.dtsi" > > > > > + > > > > > +/ { > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > > > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > > > > +}; > > > > > + > > > > > +ðernet0 { > > > > > + phy-mode = "2500base-x"; > > > > > +}; > > > > > + > > > > > +ðernet1 { > > > > > + phy-mode = "2500base-x"; > > > > > +}; > > > > > + > > > > > +&mdio { > > > > > + compatible = "snps,dwmac-mdio"; > > > > > + #address-cells = <1>; > > > > > + #size-cells = <0>; > > > > > + > > > > > + sgmii_phy0: phy@8 { > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > + reg = <0x8>; > > > > > + device_type = "ethernet-phy"; > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > + reset-assert-us = <11000>; > > > > > + reset-deassert-us = <70000>; > > > > > + }; > > > > > + > > > > > + sgmii_phy1: phy@0 { > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > + reg = <0x0>; > > > > > + device_type = "ethernet-phy"; > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > + reset-assert-us = <11000>; > > > > > + reset-deassert-us = <70000>; > > > > > + }; > > > > > +}; > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > new file mode 100644 > > > > > index 000000000000..3b524359a72d > > > > > --- /dev/null > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > @@ -0,0 +1,46 @@ > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > +/* > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > + */ > > > > > +/dts-v1/; > > > > > + > > > > > +#include "sa8775p-ride.dtsi" > > > > > + > > > > > +/ { > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > > > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > > > > +}; > > > > > + > > > > > +ðernet0 { > > > > > + phy-mode = "sgmii"; > > > > > +}; > > > > > + > > > > > +ðernet1 { > > > > > + phy-mode = "sgmii"; > > > > > +}; > > > > > + > > > > > +&mdio { > > > > > + compatible = "snps,dwmac-mdio"; > > > > > + #address-cells = <1>; > > > > > + #size-cells = <0>; > > > > > + > > > > > + sgmii_phy0: phy@8 { > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > + reg = <0x8>; > > > > > + device_type = "ethernet-phy"; > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > + reset-assert-us = <11000>; > > > > > + reset-deassert-us = <70000>; > > > > > + }; > > > > > + > > > > > + sgmii_phy1: phy@a { > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > + reg = <0xa>; > > > > > + device_type = "ethernet-phy"; > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > + reset-assert-us = <11000>; > > > > > + reset-deassert-us = <70000>; > > > > > + }; > > > > > +}; > > > > > -- > > > > > 2.47.0 > > > > > > > > > > > > > -- > > > > With best wishes > > > > Dmitry > > > > > > > > > Thanks & Regards, > > > Wasim > > > > -- > > With best wishes > > Dmitry > > > Thanks & Regards, > Wasim
On Fri, Jan 03, 2025 at 12:31:55PM +0200, Dmitry Baryshkov wrote: > On Fri, Jan 03, 2025 at 12:37:50PM +0530, Wasim Nazir wrote: > > On Fri, Jan 03, 2025 at 07:50:43AM +0200, Dmitry Baryshkov wrote: > > > On Thu, Jan 02, 2025 at 02:37:39PM +0530, Wasim Nazir wrote: > > > > On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > > > > > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > > > > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > > > > > > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > > > > > subsystem which is available in QCS9100, and it affects thermal > > > > > > management. > > > > > > > > > > > > Also, between ride and ride-r3 ethernet phy is different. > > > > > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > > > > > > > > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > > > > > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > > > > > include corresponding SA8775P files. > > > > > > > > > > This is not ideal for the following reasons: > > > > > - The approach is not uniform (between QCS9100 and QCS9075), which might > > > > > lead to mistakes. > > > > > - The approach ends up duplicating DT code unnecessarily, which can lead > > > > > to issues being patches in the one board file, but not in the other > > > > > file. > > > > > > > > > > If there are any reasons why you want to follow this approach, they must > > > > > be a part of the commit message. > > > > > > > > > > > > > Hi Dmitry, > > > > > > > > Initially, we included the DTS [1] file to avoid duplication. However, > > > > based on Krzysztof's previous suggestion [2], we change to this format. > > > > > > > > Please let us know how to proceed further on this. > > > > > > Krzysztof asked you to include DTSI files instead of including DTS > > > files. Hope this helps. > > > > Are you suggesting that we should also modify the 9100-ride files to > > include DTSI instead of DTS for consistency between QCS9100 and QCS9075? > > However, this would result in the duplication of Ethernet nodes in all > > the ride board files. Would that be acceptable? > > git mv foo.dts foo.dtsi > echo '#include "foo.dtsi"' > foo.dts > git add foo.dts > git commit > We cannot convert sa8775p-ride-r3.dts and sa8775p-ride.dts to .dtsi as they represent different platforms. In patch [1], we included these DTS files to reuse the common hardware nodes. Could you please advise on how we should proceed with the following approaches? a) Previous approach [1]: Include sa8775p-ride-r3.dts and sa8775p-ride.dts in the qcs9075-ride platform DTS, similar to the qcs9100-ride platform DTS. This approach avoids duplicating Ethernet nodes and maintains uniformity. However, it involves including the DTS file directly. b) Current suggestion: Include sa8775p-ride.dtsi in the qcs9075-ride platform DTS and also modify the qcs9100-ride platform DTS files to maintain uniformity. This approach results in duplicating Ethernet nodes. Please let us know your recommendation to finalize the DT structure. [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > > > > > > > > > > > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > > > [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > > > > > > > > > > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > > > > > --- > > > > > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > > > > > 3 files changed, 94 insertions(+) > > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > > > > > index 78613a1bd34a..41cb2bbd3472 100644 > > > > > > --- a/arch/arm64/boot/dts/qcom/Makefile > > > > > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > > > > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > new file mode 100644 > > > > > > index 000000000000..d9a8956d3a76 > > > > > > --- /dev/null > > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > @@ -0,0 +1,46 @@ > > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > > +/* > > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > > + */ > > > > > > +/dts-v1/; > > > > > > + > > > > > > +#include "sa8775p-ride.dtsi" > > > > > > + > > > > > > +/ { > > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > > > > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > > > > > +}; > > > > > > + > > > > > > +ðernet0 { > > > > > > + phy-mode = "2500base-x"; > > > > > > +}; > > > > > > + > > > > > > +ðernet1 { > > > > > > + phy-mode = "2500base-x"; > > > > > > +}; > > > > > > + > > > > > > +&mdio { > > > > > > + compatible = "snps,dwmac-mdio"; > > > > > > + #address-cells = <1>; > > > > > > + #size-cells = <0>; > > > > > > + > > > > > > + sgmii_phy0: phy@8 { > > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > > + reg = <0x8>; > > > > > > + device_type = "ethernet-phy"; > > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > > + reset-assert-us = <11000>; > > > > > > + reset-deassert-us = <70000>; > > > > > > + }; > > > > > > + > > > > > > + sgmii_phy1: phy@0 { > > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > > + reg = <0x0>; > > > > > > + device_type = "ethernet-phy"; > > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > > + reset-assert-us = <11000>; > > > > > > + reset-deassert-us = <70000>; > > > > > > + }; > > > > > > +}; > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > new file mode 100644 > > > > > > index 000000000000..3b524359a72d > > > > > > --- /dev/null > > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > @@ -0,0 +1,46 @@ > > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > > +/* > > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > > + */ > > > > > > +/dts-v1/; > > > > > > + > > > > > > +#include "sa8775p-ride.dtsi" > > > > > > + > > > > > > +/ { > > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > > > > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > > > > > +}; > > > > > > + > > > > > > +ðernet0 { > > > > > > + phy-mode = "sgmii"; > > > > > > +}; > > > > > > + > > > > > > +ðernet1 { > > > > > > + phy-mode = "sgmii"; > > > > > > +}; > > > > > > + > > > > > > +&mdio { > > > > > > + compatible = "snps,dwmac-mdio"; > > > > > > + #address-cells = <1>; > > > > > > + #size-cells = <0>; > > > > > > + > > > > > > + sgmii_phy0: phy@8 { > > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > > + reg = <0x8>; > > > > > > + device_type = "ethernet-phy"; > > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > > + reset-assert-us = <11000>; > > > > > > + reset-deassert-us = <70000>; > > > > > > + }; > > > > > > + > > > > > > + sgmii_phy1: phy@a { > > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > > + reg = <0xa>; > > > > > > + device_type = "ethernet-phy"; > > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > > + reset-assert-us = <11000>; > > > > > > + reset-deassert-us = <70000>; > > > > > > + }; > > > > > > +}; > > > > > > -- > > > > > > 2.47.0 > > > > > > > > > > > > > > > > -- > > > > > With best wishes > > > > > Dmitry > > > > > > > > > > > > Thanks & Regards, > > > > Wasim > > > > > > -- > > > With best wishes > > > Dmitry > > > > > > Thanks & Regards, > > Wasim > > -- > With best wishes > Dmitry Thanks & Regards, Wasim
On Sat, Jan 04, 2025 at 12:29:07AM +0530, Wasim Nazir wrote: > On Fri, Jan 03, 2025 at 12:31:55PM +0200, Dmitry Baryshkov wrote: > > On Fri, Jan 03, 2025 at 12:37:50PM +0530, Wasim Nazir wrote: > > > On Fri, Jan 03, 2025 at 07:50:43AM +0200, Dmitry Baryshkov wrote: > > > > On Thu, Jan 02, 2025 at 02:37:39PM +0530, Wasim Nazir wrote: > > > > > On Mon, Dec 30, 2024 at 05:45:39PM +0200, Dmitry Baryshkov wrote: > > > > > > On Sun, Dec 29, 2024 at 08:53:31PM +0530, Wasim Nazir wrote: > > > > > > > Add device tree support for QCS9075 Ride & Ride-r3 boards. > > > > > > > > > > > > > > QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) > > > > > > > subsystem which is available in QCS9100, and it affects thermal > > > > > > > management. > > > > > > > > > > > > > > Also, between ride and ride-r3 ethernet phy is different. > > > > > > > Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. > > > > > > > > > > > > Your board files duplicate sa8775p-ride-r3.dts and sa8775p-ride.dts, but > > > > > > include them. Existing qcs9100-ride-r3.dts and qcs9100-ride-r3.dts just > > > > > > include corresponding SA8775P files. > > > > > > > > > > > > This is not ideal for the following reasons: > > > > > > - The approach is not uniform (between QCS9100 and QCS9075), which might > > > > > > lead to mistakes. > > > > > > - The approach ends up duplicating DT code unnecessarily, which can lead > > > > > > to issues being patches in the one board file, but not in the other > > > > > > file. > > > > > > > > > > > > If there are any reasons why you want to follow this approach, they must > > > > > > be a part of the commit message. > > > > > > > > > > > > > > > > Hi Dmitry, > > > > > > > > > > Initially, we included the DTS [1] file to avoid duplication. However, > > > > > based on Krzysztof's previous suggestion [2], we change to this format. > > > > > > > > > > Please let us know how to proceed further on this. > > > > > > > > Krzysztof asked you to include DTSI files instead of including DTS > > > > files. Hope this helps. > > > > > > Are you suggesting that we should also modify the 9100-ride files to > > > include DTSI instead of DTS for consistency between QCS9100 and QCS9075? > > > However, this would result in the duplication of Ethernet nodes in all > > > the ride board files. Would that be acceptable? > > > > git mv foo.dts foo.dtsi > > echo '#include "foo.dtsi"' > foo.dts > > git add foo.dts > > git commit > > > > We cannot convert sa8775p-ride-r3.dts and sa8775p-ride.dts to .dtsi as > they represent different platforms. In patch [1], we included these DTS > files to reuse the common hardware nodes. > > Could you please advise on how we should proceed with the following > approaches? > > a) Previous approach [1]: > Include sa8775p-ride-r3.dts and sa8775p-ride.dts in the qcs9075-ride > platform DTS, similar to the qcs9100-ride platform DTS. This approach > avoids duplicating Ethernet nodes and maintains uniformity. However, it > involves including the DTS file directly. > > b) Current suggestion: > Include sa8775p-ride.dtsi in the qcs9075-ride platform DTS and also > modify the qcs9100-ride platform DTS files to maintain uniformity. This > approach results in duplicating Ethernet nodes. > > Please let us know your recommendation to finalize the DT structure. sa8775p.dtsi `__sa8775p-ride.dtsi `__sa8775p-ride-r2.dtsi `__sa8775p-ride.dts `__qcs9100-ride.dts `__qcs9075-ride.dts `__sa8775p-ride-r3.dtsi `__sa8775p-ride-r3.dts `__qcs9100-ride-r3.dts `__qcs9075-ride-r3.dts > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > > > > > > > > > > > > > > > > > [1] https://lore.kernel.org/all/20241119174954.1219002-6-quic_wasimn@quicinc.com/ > > > > > [2] https://lore.kernel.org/all/8cf9edc0-a0cb-4fd0-b10e-2138784dfba3@kernel.org/ > > > > > > > > > > > > > > > > > > > Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> > > > > > > > --- > > > > > > > arch/arm64/boot/dts/qcom/Makefile | 2 + > > > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ > > > > > > > arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ > > > > > > > 3 files changed, 94 insertions(+) > > > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > > create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > > > > > > > index 78613a1bd34a..41cb2bbd3472 100644 > > > > > > > --- a/arch/arm64/boot/dts/qcom/Makefile > > > > > > > +++ b/arch/arm64/boot/dts/qcom/Makefile > > > > > > > @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb > > > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb > > > > > > > +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb > > > > > > > dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > > new file mode 100644 > > > > > > > index 000000000000..d9a8956d3a76 > > > > > > > --- /dev/null > > > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts > > > > > > > @@ -0,0 +1,46 @@ > > > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > > > +/* > > > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > > > + */ > > > > > > > +/dts-v1/; > > > > > > > + > > > > > > > +#include "sa8775p-ride.dtsi" > > > > > > > + > > > > > > > +/ { > > > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; > > > > > > > + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; > > > > > > > +}; > > > > > > > + > > > > > > > +ðernet0 { > > > > > > > + phy-mode = "2500base-x"; > > > > > > > +}; > > > > > > > + > > > > > > > +ðernet1 { > > > > > > > + phy-mode = "2500base-x"; > > > > > > > +}; > > > > > > > + > > > > > > > +&mdio { > > > > > > > + compatible = "snps,dwmac-mdio"; > > > > > > > + #address-cells = <1>; > > > > > > > + #size-cells = <0>; > > > > > > > + > > > > > > > + sgmii_phy0: phy@8 { > > > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > > > + reg = <0x8>; > > > > > > > + device_type = "ethernet-phy"; > > > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > > > + reset-assert-us = <11000>; > > > > > > > + reset-deassert-us = <70000>; > > > > > > > + }; > > > > > > > + > > > > > > > + sgmii_phy1: phy@0 { > > > > > > > + compatible = "ethernet-phy-id31c3.1c33"; > > > > > > > + reg = <0x0>; > > > > > > > + device_type = "ethernet-phy"; > > > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > > > + reset-assert-us = <11000>; > > > > > > > + reset-deassert-us = <70000>; > > > > > > > + }; > > > > > > > +}; > > > > > > > diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > new file mode 100644 > > > > > > > index 000000000000..3b524359a72d > > > > > > > --- /dev/null > > > > > > > +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts > > > > > > > @@ -0,0 +1,46 @@ > > > > > > > +// SPDX-License-Identifier: BSD-3-Clause > > > > > > > +/* > > > > > > > + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. > > > > > > > + */ > > > > > > > +/dts-v1/; > > > > > > > + > > > > > > > +#include "sa8775p-ride.dtsi" > > > > > > > + > > > > > > > +/ { > > > > > > > + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; > > > > > > > + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; > > > > > > > +}; > > > > > > > + > > > > > > > +ðernet0 { > > > > > > > + phy-mode = "sgmii"; > > > > > > > +}; > > > > > > > + > > > > > > > +ðernet1 { > > > > > > > + phy-mode = "sgmii"; > > > > > > > +}; > > > > > > > + > > > > > > > +&mdio { > > > > > > > + compatible = "snps,dwmac-mdio"; > > > > > > > + #address-cells = <1>; > > > > > > > + #size-cells = <0>; > > > > > > > + > > > > > > > + sgmii_phy0: phy@8 { > > > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > > > + reg = <0x8>; > > > > > > > + device_type = "ethernet-phy"; > > > > > > > + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; > > > > > > > + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; > > > > > > > + reset-assert-us = <11000>; > > > > > > > + reset-deassert-us = <70000>; > > > > > > > + }; > > > > > > > + > > > > > > > + sgmii_phy1: phy@a { > > > > > > > + compatible = "ethernet-phy-id0141.0dd4"; > > > > > > > + reg = <0xa>; > > > > > > > + device_type = "ethernet-phy"; > > > > > > > + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; > > > > > > > + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; > > > > > > > + reset-assert-us = <11000>; > > > > > > > + reset-deassert-us = <70000>; > > > > > > > + }; > > > > > > > +}; > > > > > > > -- > > > > > > > 2.47.0 > > > > > > > > > > > > > > > > > > > -- > > > > > > With best wishes > > > > > > Dmitry > > > > > > > > > > > > > > > Thanks & Regards, > > > > > Wasim > > > > > > > > -- > > > > With best wishes > > > > Dmitry > > > > > > > > > Thanks & Regards, > > > Wasim > > > > -- > > With best wishes > > Dmitry > > Thanks & Regards, > Wasim
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 78613a1bd34a..41cb2bbd3472 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -118,6 +118,8 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs6490-rb3gen2.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8300-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs8550-aim300-aiot.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9075-rb8.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride.dtb +dtb-$(CONFIG_ARCH_QCOM) += qcs9075-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs9100-ride-r3.dtb dtb-$(CONFIG_ARCH_QCOM) += qdu1000-idp.dtb diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts new file mode 100644 index 000000000000..d9a8956d3a76 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. QCS9075 Ride Rev3"; + compatible = "qcom,qcs9075-ride-r3", "qcom,qcs9075", "qcom,sa8775p"; +}; + +ðernet0 { + phy-mode = "2500base-x"; +}; + +ðernet1 { + phy-mode = "2500base-x"; +}; + +&mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy0: phy@8 { + compatible = "ethernet-phy-id31c3.1c33"; + reg = <0x8>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + + sgmii_phy1: phy@0 { + compatible = "ethernet-phy-id31c3.1c33"; + reg = <0x0>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs9075-ride.dts b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts new file mode 100644 index 000000000000..3b524359a72d --- /dev/null +++ b/arch/arm64/boot/dts/qcom/qcs9075-ride.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ +/dts-v1/; + +#include "sa8775p-ride.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. QCS9075 Ride"; + compatible = "qcom,qcs9075-ride", "qcom,qcs9075", "qcom,sa8775p"; +}; + +ðernet0 { + phy-mode = "sgmii"; +}; + +ðernet1 { + phy-mode = "sgmii"; +}; + +&mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy0: phy@8 { + compatible = "ethernet-phy-id0141.0dd4"; + reg = <0x8>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; + + sgmii_phy1: phy@a { + compatible = "ethernet-phy-id0141.0dd4"; + reg = <0xa>; + device_type = "ethernet-phy"; + interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>; + reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>; + reset-assert-us = <11000>; + reset-deassert-us = <70000>; + }; +};
Add device tree support for QCS9075 Ride & Ride-r3 boards. QCS9075 lacks the safety monitoring features of Safety-Island (SAIL) subsystem which is available in QCS9100, and it affects thermal management. Also, between ride and ride-r3 ethernet phy is different. Ride uses 1G ethernet phy while ride-r3 uses 2.5G ethernet phy. Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com> --- arch/arm64/boot/dts/qcom/Makefile | 2 + arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts | 46 ++++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs9075-ride.dts | 46 ++++++++++++++++++++ 3 files changed, 94 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride-r3.dts create mode 100644 arch/arm64/boot/dts/qcom/qcs9075-ride.dts -- 2.47.0