| Message ID | 20250108055842.2042876-4-quic_varada@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add PCIe support for Qualcomm IPQ5332 | expand |
On 08/01/2025 06:58, Varadarajan Narayanan wrote: > Document the PCIe controller on IPQ5332 platform. IPQ5332 will > use IPQ9574 as the fall back compatible. > > All DT entries except "reg" is similar between ipq5332 and > ipq9574. ipq9574 has 5 registers while ipq5332 has 6. MHI is the > additional (i.e. sixth entry). Since this matches with the > sdx55's "reg" definition which allows for 5 or 6 registers, > combine ipq9574 and ipq5332 with sdx55. Without this > dt_binding_check fails. > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> > --- > v6: Commit message update only. Add info regarding the moving of > ipq9574 from 5 "reg" definition to 5 or 6 reg definition. > You gave yourself 4 days to respond to my comment. To me, you gave around 18h, through most of the time I was offline or sleeping, and then sent new version. NAK, implement the feedback and keep discussing in the previous version. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index bd87f6b49d68..9f37eca1ce0d 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -26,7 +26,6 @@ properties: - qcom,pcie-ipq8064-v2 - qcom,pcie-ipq8074 - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 - qcom,pcie-msm8996 - qcom,pcie-qcs404 - qcom,pcie-sdm845 @@ -34,6 +33,10 @@ properties: - items: - const: qcom,pcie-msm8998 - const: qcom,pcie-msm8996 + - items: + - enum: + - qcom,pcie-ipq5332 + - const: qcom,pcie-ipq9574 reg: minItems: 4 @@ -165,7 +168,6 @@ allOf: enum: - qcom,pcie-ipq6018 - qcom,pcie-ipq8074-gen3 - - qcom,pcie-ipq9574 then: properties: reg: @@ -206,6 +208,8 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq5332 + - qcom,pcie-ipq9574 - qcom,pcie-sdx55 then: properties: @@ -407,6 +411,7 @@ allOf: compatible: contains: enum: + - qcom,pcie-ipq5332 - qcom,pcie-ipq9574 then: properties: @@ -555,6 +560,7 @@ allOf: enum: - qcom,pcie-apq8064 - qcom,pcie-ipq4019 + - qcom,pcie-ipq5332 - qcom,pcie-ipq8064 - qcom,pcie-ipq8064v2 - qcom,pcie-ipq8074
Document the PCIe controller on IPQ5332 platform. IPQ5332 will use IPQ9574 as the fall back compatible. All DT entries except "reg" is similar between ipq5332 and ipq9574. ipq9574 has 5 registers while ipq5332 has 6. MHI is the additional (i.e. sixth entry). Since this matches with the sdx55's "reg" definition which allows for 5 or 6 registers, combine ipq9574 and ipq5332 with sdx55. Without this dt_binding_check fails. Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> --- v6: Commit message update only. Add info regarding the moving of ipq9574 from 5 "reg" definition to 5 or 6 reg definition. v5: Re-arrange 5332 and 9574 compatibles to handle fallback usage in dts v4: * v3 reused ipq9574 bindings for ipq5332. Instead add one for ipq5332 * DTS uses ipq9574 compatible as fallback. Hence move ipq9574 to be able to use the 'reg' section for both ipq5332 and ipq9574. Else, dtbs_check and dt_binding_check flag errors. --- Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)