Message ID | 20250114182021.670435-3-dario.binacchi@amarulasolutions.com (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show |
Series | Support spread spectrum clocking for stm32f{4,7} platforms | expand |
Quoting Dario Binacchi (2025-01-14 10:19:47) > The addition of DT bindings for enabling and tuning spread spectrum > clocking generation is available only for the main PLL of stm32f{4,7} > platforms. > > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- Applied to clk-next
On 16/01/2025 00:22, Stephen Boyd wrote: > Quoting Dario Binacchi (2025-01-14 10:19:47) >> The addition of DT bindings for enabling and tuning spread spectrum >> clocking generation is available only for the main PLL of stm32f{4,7} >> platforms. >> >> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> --- > > Applied to clk-next Unlucky timing. NXP just sent this: https://github.com/devicetree-org/dt-schema/pull/154 which makes these bindings obsolete. Best regards, Krzysztof
On Fri, Jan 24, 2025 at 2:45 PM Krzysztof Kozlowski <krzk@kernel.org> wrote: > > On 16/01/2025 00:22, Stephen Boyd wrote: > > Quoting Dario Binacchi (2025-01-14 10:19:47) > >> The addition of DT bindings for enabling and tuning spread spectrum > >> clocking generation is available only for the main PLL of stm32f{4,7} > >> platforms. > >> > >> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> > >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> > >> --- > > > > Applied to clk-next > > Unlucky timing. NXP just sent this: > > https://github.com/devicetree-org/dt-schema/pull/154 > > which makes these bindings obsolete. > Why have the DT bindings already become obsolete even though the PR has not yet been accepted? The series has already been merged into the kernel. Please let me know if and when I need to make the changes. This is the first time I find myself in such a situation. Thanks and regards, Dario > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml index 8f2494a0b28e..f83a6120d65a 100644 --- a/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml +++ b/Documentation/devicetree/bindings/clock/st,stm32-rcc.yaml @@ -53,6 +53,26 @@ properties: Phandle to system configuration controller. It can be used to control the power domain circuitry. + st,ssc-modfreq-hz: + description: + The modulation frequency for main PLL (in Hz) + + st,ssc-moddepth-permyriad: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + The modulation rate for main PLL (in permyriad, i.e. 0.01%) + minimum: 25 + maximum: 200 + + st,ssc-modmethod: + $ref: /schemas/types.yaml#/definitions/string + description: + The modulation techniques for main PLL. + items: + enum: + - center-spread + - down-spread + required: - compatible - reg @@ -78,6 +98,10 @@ allOf: - description: high speed external (HSE) clock input - description: low speed external (LSE) clock input - description: Inter-IC sound (I2S) clock input + st,ssc-modfreq-hz: false + st,ssc-moddepth-permyriad: false + st,ssc-modmethod: false + else: properties: '#clock-cells': @@ -95,6 +119,18 @@ additionalProperties: false examples: # Reset and Clock Control Module node: + - | + clock-controller@40023800 { + compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; + reg = <0x40023800 0x400>; + #clock-cells = <2>; + #reset-cells = <1>; + clocks = <&clk_hse>, <&clk_i2s_ckin>; + st,syscfg = <&pwrcfg>; + st,ssc-modfreq-hz = <10000>; + st,ssc-moddepth-permyriad = <200>; + st,ssc-modmethod = "center-spread"; + }; - | clock-controller@58024400 { compatible = "st,stm32h743-rcc", "st,stm32-rcc";