| Message ID | AM8P250MB0124A0783965B48A29EFAE6AE11A2@AM8P250MB0124.EURP250.PROD.OUTLOOK.COM (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: phy: c45-tjaxx: add delay between MDIO write and read in soft_reset | expand |
On Thu, 16 Jan 2025 14:55:39 +0000 Milos Reljin wrote: > Add delay before first MDIO read following MDIO write in soft_reset > function. Without this, soft_reset fails and PHY init cannot complete. A bit more info about the problem would be good. Does the problem happen every time for you, if not how often? What PHY chip do you see this with exactly? The driver supports at least two. If you can repro with a evaluation / development / reference board of some sort please also mention which.
On Mon, Jan 20, 2025 at 02:47:56PM -0800, Jakub Kicinski wrote: > On Thu, 16 Jan 2025 14:55:39 +0000 Milos Reljin wrote: > > Add delay before first MDIO read following MDIO write in soft_reset > > function. Without this, soft_reset fails and PHY init cannot complete. > > A bit more info about the problem would be good. > > Does the problem happen every time for you, if not how often? Yes, soft_reset in original driver always returns error. > What PHY chip do you see this with exactly? The driver supports > at least two. If you can repro with a evaluation / development / > reference board of some sort please also mention which. > -- > pw-bot: cr The PHY is TJA1120A and its PHY_ID_2 register reports value of 0xB031. Unfortunately I don't have evaluation board - I'm working on custom board bringup. Linux is running on TI J784S4 SoC. If you have access to TJA1120's application note (AN13663), page 30 contains info on startup timing.
> If you have access to TJA1120's application note (AN13663), page 30 > contains info on startup timing. You could summarise what the datasheet says in the commit message. It then becomes clear where you got the values from, making a good justification. Andrew
On Tue, Jan 21, 2025 at 03:02:17PM +0100, Andrew Lunn wrote: > > If you have access to TJA1120's application note (AN13663), page 30 > > contains info on startup timing. > > You could summarise what the datasheet says in the commit message. It > then becomes clear where you got the values from, making a good > justification. > > Andrew Good suggestion, thanks. I'll add this in the next version of patch. In datasheet there's a figure with average PHY startup timing values with measurement uncertainty following software reset. The time it takes for SMI to become operational after software reset ranges roughly from 500 us to 1500 us. In the next version of this patch, instead of setting the last parameter of phy_read_mmd_poll_timeout (sleep_before_read) to true (which adds a 20000 us sleep and by datasheet is excessive), I can add: usleep_range(2000, 2050); before the line with phy_read_mmd_poll_timeout. I tested with 1000 us and it was working, but to be sure, 2000 us should cover the worst case.
diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c index ade544bc007d..be0ca7b12dc3 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.c +++ b/drivers/net/phy/nxp-c45-tja11xx.c @@ -1300,7 +1300,7 @@ static int nxp_c45_soft_reset(struct phy_device *phydev) return phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1, VEND1_DEVICE_CONTROL, ret, !(ret & DEVICE_CONTROL_RESET), 20000, - 240000, false); + 240000, true); } static int nxp_c45_cable_test_start(struct phy_device *phydev)
Add delay before first MDIO read following MDIO write in soft_reset function. Without this, soft_reset fails and PHY init cannot complete. Signed-off-by: Milos Reljin <milos_reljin@outlook.com> --- drivers/net/phy/nxp-c45-tja11xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)