| Message ID | 20250126134616.37334-2-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add RZ/G3E SDHI support | expand |
Hi Biju, Thanks for the patch. On Sun, Jan 26, 2025 at 01:46:03PM +0000, Biju Das wrote: > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that > of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must > use SD_STATUS register to control voltage and power enable (internal > regulator). > > For SD1 and SD2 channel we can either use gpio regulator or internal > regulator (using SD_STATUS register) for voltage switching. > > Document RZ/G3E SDHI IP support. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > index af378b9ff3f4..ef3acf0f58e0 100644 > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > @@ -68,6 +68,9 @@ properties: > - renesas,sdhi-r9a08g045 # RZ/G3S > - renesas,sdhi-r9a09g011 # RZ/V2M > - const: renesas,rzg2l-sdhi > + - items: > + - const: renesas,sdhi-r9a09g047 # RZ/G3E > + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) > > reg: > maxItems: 1 > @@ -124,6 +127,7 @@ allOf: > compatible: > contains: > enum: > + - renesas,sdhi-r9a09g047 > - renesas,sdhi-r9a09g057 > - renesas,rzg2l-sdhi > then: > @@ -211,6 +215,22 @@ allOf: > sectioned off to be run by a separate second clock source to allow > the main core clock to be turned off to save power. > > + - if: > + properties: > + compatible: > + contains: > + const: renesas,sdhi-r9a09g047 > + then: > + properties: > + vqmmc-regulator: > + type: object > + description: VQMMC SD regulator > + $ref: /schemas/regulator/regulator.yaml# > + unevaluatedProperties: false > + > + required: > + - vqmmc-regulator > + > required: > - compatible > - reg > -- > 2.43.0 > Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
On Sun, Jan 26, 2025 at 01:46:03PM +0000, Biju Das wrote: > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that > of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must > use SD_STATUS register to control voltage and power enable (internal > regulator). > > For SD1 and SD2 channel we can either use gpio regulator or internal > regulator (using SD_STATUS register) for voltage switching. > > Document RZ/G3E SDHI IP support. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > index af378b9ff3f4..ef3acf0f58e0 100644 > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > @@ -68,6 +68,9 @@ properties: > - renesas,sdhi-r9a08g045 # RZ/G3S > - renesas,sdhi-r9a09g011 # RZ/V2M > - const: renesas,rzg2l-sdhi > + - items: > + - const: renesas,sdhi-r9a09g047 # RZ/G3E > + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) > > reg: > maxItems: 1 > @@ -124,6 +127,7 @@ allOf: > compatible: > contains: > enum: > + - renesas,sdhi-r9a09g047 > - renesas,sdhi-r9a09g057 > - renesas,rzg2l-sdhi > then: > @@ -211,6 +215,22 @@ allOf: > sectioned off to be run by a separate second clock source to allow > the main core clock to be turned off to save power. > > + - if: > + properties: > + compatible: > + contains: > + const: renesas,sdhi-r9a09g047 > + then: > + properties: > + vqmmc-regulator: > + type: object > + description: VQMMC SD regulator > + $ref: /schemas/regulator/regulator.yaml# > + unevaluatedProperties: false > + > + required: > + - vqmmc-regulator The driver treats this as optional. If this is required, then is renesas,sdhi-r9a09g047 really compatible with renesas,sdhi-r9a09g057? Rob
Hi Rob, Thanks for the feedback. > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 27 January 2025 19:16 > Subject: Re: [PATCH 1/7] dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support > > On Sun, Jan 26, 2025 at 01:46:03PM +0000, Biju Das wrote: > > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of > > the RZ/V2H, but the SD0 channel has only dedicated pins, so we must > > use SD_STATUS register to control voltage and power enable (internal > > regulator). > > > > For SD1 and SD2 channel we can either use gpio regulator or internal > > regulator (using SD_STATUS register) for voltage switching. > > > > Document RZ/G3E SDHI IP support. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > .../devicetree/bindings/mmc/renesas,sdhi.yaml | 20 > > +++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > index af378b9ff3f4..ef3acf0f58e0 100644 > > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > @@ -68,6 +68,9 @@ properties: > > - renesas,sdhi-r9a08g045 # RZ/G3S > > - renesas,sdhi-r9a09g011 # RZ/V2M > > - const: renesas,rzg2l-sdhi > > + - items: > > + - const: renesas,sdhi-r9a09g047 # RZ/G3E > > + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) > > > > reg: > > maxItems: 1 > > @@ -124,6 +127,7 @@ allOf: > > compatible: > > contains: > > enum: > > + - renesas,sdhi-r9a09g047 > > - renesas,sdhi-r9a09g057 > > - renesas,rzg2l-sdhi > > then: > > @@ -211,6 +215,22 @@ allOf: > > sectioned off to be run by a separate second clock source to allow > > the main core clock to be turned off to save power. > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: renesas,sdhi-r9a09g047 > > + then: > > + properties: > > + vqmmc-regulator: > > + type: object > > + description: VQMMC SD regulator > > + $ref: /schemas/regulator/regulator.yaml# > > + unevaluatedProperties: false > > + > > + required: > > + - vqmmc-regulator > > The driver treats this as optional. If this is required, then is > renesas,sdhi-r9a09g047 really compatible with renesas,sdhi-r9a09g057? Ok, I will make it optional for both renesas,sdhi-r9a09g057 and renesas,sdhi-r9a09g047 in the next version. Cheers, Biju
Hi Biju, On Sun, 26 Jan 2025 at 14:46, Biju Das <biju.das.jz@bp.renesas.com> wrote: > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that > of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must > use SD_STATUS register to control voltage and power enable (internal > regulator). > > For SD1 and SD2 channel we can either use gpio regulator or internal > regulator (using SD_STATUS register) for voltage switching. > Document RZ/G3E SDHI IP support. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Thanks for your patch! > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > @@ -68,6 +68,9 @@ properties: > - renesas,sdhi-r9a08g045 # RZ/G3S > - renesas,sdhi-r9a09g011 # RZ/V2M > - const: renesas,rzg2l-sdhi > + - items: > + - const: renesas,sdhi-r9a09g047 # RZ/G3E > + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) OK... but... > > reg: > maxItems: 1 > @@ -124,6 +127,7 @@ allOf: > compatible: > contains: > enum: > + - renesas,sdhi-r9a09g047 > - renesas,sdhi-r9a09g057 > - renesas,rzg2l-sdhi > then: > @@ -211,6 +215,22 @@ allOf: > sectioned off to be run by a separate second clock source to allow > the main core clock to be turned off to save power. > > + - if: > + properties: > + compatible: > + contains: > + const: renesas,sdhi-r9a09g047 > + then: > + properties: > + vqmmc-regulator: > + type: object > + description: VQMMC SD regulator > + $ref: /schemas/regulator/regulator.yaml# > + unevaluatedProperties: false > + > + required: > + - vqmmc-regulator > + > required: > - compatible > - reg Given RZ/V2H can use the internal regulator control, too, I think it can be optional on both. Then renesas,sdhi-r9a09g047 can just use renesas,sdhi-r9a09g057 as a fallback compatible. Note for the casual reader: as the related pins can be used as GPIOs on all RZ/V2H SD channels, the initial idea to add support for the internal regulator control was dropped, and replaced by the simpler solution of using a gpio-regulator. Unfortunately that simple option is not available for SD0 on RZ/G3E. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi Geert, Thanks for the feedback. > -----Original Message----- > From: Geert Uytterhoeven <geert@linux-m68k.org> > Sent: 28 January 2025 11:16 > Subject: Re: [PATCH 1/7] dt-bindings: mmc: renesas,sdhi: Document RZ/G3E support > > Hi Biju, > > On Sun, 26 Jan 2025 at 14:46, Biju Das <biju.das.jz@bp.renesas.com> wrote: > > The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of > > the RZ/V2H, but the SD0 channel has only dedicated pins, so we must > > use SD_STATUS register to control voltage and power enable (internal > > regulator). > > > > For SD1 and SD2 channel we can either use gpio regulator or internal > > regulator (using SD_STATUS register) for voltage switching. > > Document RZ/G3E SDHI IP support. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > Thanks for your patch! > > > --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml > > @@ -68,6 +68,9 @@ properties: > > - renesas,sdhi-r9a08g045 # RZ/G3S > > - renesas,sdhi-r9a09g011 # RZ/V2M > > - const: renesas,rzg2l-sdhi > > + - items: > > + - const: renesas,sdhi-r9a09g047 # RZ/G3E > > + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) > > OK... but... > > > > > reg: > > maxItems: 1 > > @@ -124,6 +127,7 @@ allOf: > > compatible: > > contains: > > enum: > > + - renesas,sdhi-r9a09g047 > > - renesas,sdhi-r9a09g057 > > - renesas,rzg2l-sdhi > > then: > > @@ -211,6 +215,22 @@ allOf: > > sectioned off to be run by a separate second clock source to allow > > the main core clock to be turned off to save power. > > > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: renesas,sdhi-r9a09g047 > > + then: > > + properties: > > + vqmmc-regulator: > > + type: object > > + description: VQMMC SD regulator > > + $ref: /schemas/regulator/regulator.yaml# > > + unevaluatedProperties: false > > + > > + required: > > + - vqmmc-regulator > > + > > required: > > - compatible > > - reg > > Given RZ/V2H can use the internal regulator control, too, I think it can be optional on both. Then > renesas,sdhi-r9a09g047 can just use > renesas,sdhi-r9a09g057 as a fallback compatible. Agreed, will make internal regulator control. optional for both RZ/G2H and RZ/G3E and just use renesas,sdhi-r9a09g057 as a fallback compatible for renesas,sdhi-r9a09g047. Cheers, Biju
diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml index af378b9ff3f4..ef3acf0f58e0 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -68,6 +68,9 @@ properties: - renesas,sdhi-r9a08g045 # RZ/G3S - renesas,sdhi-r9a09g011 # RZ/V2M - const: renesas,rzg2l-sdhi + - items: + - const: renesas,sdhi-r9a09g047 # RZ/G3E + - const: renesas,sdhi-r9a09g057 # RZ/V2H(P) reg: maxItems: 1 @@ -124,6 +127,7 @@ allOf: compatible: contains: enum: + - renesas,sdhi-r9a09g047 - renesas,sdhi-r9a09g057 - renesas,rzg2l-sdhi then: @@ -211,6 +215,22 @@ allOf: sectioned off to be run by a separate second clock source to allow the main core clock to be turned off to save power. + - if: + properties: + compatible: + contains: + const: renesas,sdhi-r9a09g047 + then: + properties: + vqmmc-regulator: + type: object + description: VQMMC SD regulator + $ref: /schemas/regulator/regulator.yaml# + unevaluatedProperties: false + + required: + - vqmmc-regulator + required: - compatible - reg
The SD/MMC block on the RZ/G3E ("R9A09G047") SoC is similar to that of the RZ/V2H, but the SD0 channel has only dedicated pins, so we must use SD_STATUS register to control voltage and power enable (internal regulator). For SD1 and SD2 channel we can either use gpio regulator or internal regulator (using SD_STATUS register) for voltage switching. Document RZ/G3E SDHI IP support. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- .../devicetree/bindings/mmc/renesas,sdhi.yaml | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+)