| Message ID | 20250127132105.107138-1-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/2] dt-bindings: display/msm/dsi-phy: Add header with exposed clock IDs | expand |
On Mon, Jan 27, 2025 at 02:21:04PM +0100, Krzysztof Kozlowski wrote: > DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide > two clocks. The respective clock ID is used by drivers and DTS, so it > should be documented as explicit ABI. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Patch for Display tree, although with Ack from clock. > --- > .../devicetree/bindings/display/msm/dsi-phy-common.yaml | 2 ++ > MAINTAINERS | 1 + > include/dt-bindings/clock/qcom,dsi-phy-28nm.h | 9 +++++++++ > 3 files changed, 12 insertions(+) > create mode 100644 include/dt-bindings/clock/qcom,dsi-phy-28nm.h > > diff --git a/include/dt-bindings/clock/qcom,dsi-phy-28nm.h b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h > new file mode 100644 > index 000000000000..ab94d58377a1 > --- /dev/null > +++ b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h I think this should be dt-bindings/phy/qcom,foo.h Other than that LGTM > @@ -0,0 +1,9 @@ > +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ > + > +#ifndef _DT_BINDINGS_CLK_QCOM_DSI_PHY_28NM_H > +#define _DT_BINDINGS_CLK_QCOM_DSI_PHY_28NM_H > + > +#define DSI_BYTE_PLL_CLK 0 > +#define DSI_PIXEL_PLL_CLK 1 > + > +#endif > -- > 2.43.0 >
On 27/01/2025 14:56, Dmitry Baryshkov wrote: > On Mon, Jan 27, 2025 at 02:21:04PM +0100, Krzysztof Kozlowski wrote: >> DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide >> two clocks. The respective clock ID is used by drivers and DTS, so it >> should be documented as explicit ABI. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >> >> --- >> >> Patch for Display tree, although with Ack from clock. >> --- >> .../devicetree/bindings/display/msm/dsi-phy-common.yaml | 2 ++ >> MAINTAINERS | 1 + >> include/dt-bindings/clock/qcom,dsi-phy-28nm.h | 9 +++++++++ >> 3 files changed, 12 insertions(+) >> create mode 100644 include/dt-bindings/clock/qcom,dsi-phy-28nm.h >> > >> diff --git a/include/dt-bindings/clock/qcom,dsi-phy-28nm.h b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h >> new file mode 100644 >> index 000000000000..ab94d58377a1 >> --- /dev/null >> +++ b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h > > I think this should be dt-bindings/phy/qcom,foo.h Both options - clock or phy - work for me, although with slight preference of keeping foo constants only in foo (so clock -> clock) because then clock maintainer sees it as well. Also because I would judge by type of constants (so again clock constants -> clock directory), not type of device. We have several MFD devices, like PMICs, which have a clock, so bindings should go to mfd? But mfd is not a real device, but Linux subsystem. For many other archs, e.g Mediatek, pretty often even for the same device, the binding headers are split between clock and reset. I know that Qualcomm GCC has it in one file, with exceptions (ipq, qca8k). Also these other archs have bindings file in e.g. soc or arm, but the header in respective subsystem With exceptions of am654 and pisatchio-usb headers, we don't store clock constants in phy. Unless someone insists or there is existing qcom convention, then I rather prefer to keep it in clock. Best regards, Krzysztof
Quoting Krzysztof Kozlowski (2025-01-27 05:21:04) > DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide > two clocks. The respective clock ID is used by drivers and DTS, so it > should be documented as explicit ABI. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- Acked-by: Stephen Boyd <sboyd@kernel.org>
On Mon, Jan 27, 2025 at 03:37:05PM +0100, Krzysztof Kozlowski wrote: > On 27/01/2025 14:56, Dmitry Baryshkov wrote: > > On Mon, Jan 27, 2025 at 02:21:04PM +0100, Krzysztof Kozlowski wrote: > >> DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide > >> two clocks. The respective clock ID is used by drivers and DTS, so it > >> should be documented as explicit ABI. > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> > >> --- > >> > >> Patch for Display tree, although with Ack from clock. > >> --- > >> .../devicetree/bindings/display/msm/dsi-phy-common.yaml | 2 ++ > >> MAINTAINERS | 1 + > >> include/dt-bindings/clock/qcom,dsi-phy-28nm.h | 9 +++++++++ > >> 3 files changed, 12 insertions(+) > >> create mode 100644 include/dt-bindings/clock/qcom,dsi-phy-28nm.h > >> > > > >> diff --git a/include/dt-bindings/clock/qcom,dsi-phy-28nm.h b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h > >> new file mode 100644 > >> index 000000000000..ab94d58377a1 > >> --- /dev/null > >> +++ b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h > > > > I think this should be dt-bindings/phy/qcom,foo.h > > > Both options - clock or phy - work for me, although with slight > preference of keeping foo constants only in foo (so clock -> clock) > because then clock maintainer sees it as well. Also because I would > judge by type of constants (so again clock constants -> clock > directory), not type of device. We have several MFD devices, like PMICs, > which have a clock, so bindings should go to mfd? But mfd is not a real > device, but Linux subsystem. > > For many other archs, e.g Mediatek, pretty often even for the same > device, the binding headers are split between clock and reset. I know > that Qualcomm GCC has it in one file, with exceptions (ipq, qca8k). Also > these other archs have bindings file in e.g. soc or arm, but the header > in respective subsystem > > With exceptions of am654 and pisatchio-usb headers, we don't store clock > constants in phy. > > Unless someone insists or there is existing qcom convention, then I > rather prefer to keep it in clock. Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml index 6b57ce41c95f..d0ce85a08b6d 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml @@ -15,6 +15,8 @@ description: properties: "#clock-cells": const: 1 + description: + See include/dt-bindings/clock/qcom,dsi-phy-28nm.h for clock IDs. "#phy-cells": const: 0 diff --git a/MAINTAINERS b/MAINTAINERS index eb75c95f6c45..30103e3918ea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7398,6 +7398,7 @@ T: git https://gitlab.freedesktop.org/drm/msm.git F: Documentation/devicetree/bindings/display/msm/ F: drivers/gpu/drm/ci/xfails/msm* F: drivers/gpu/drm/msm/ +F: include/dt-bindings/clock/qcom,dsi-phy-28nm.h F: include/uapi/drm/msm_drm.h DRM DRIVER FOR NOVATEK NT35510 PANELS diff --git a/include/dt-bindings/clock/qcom,dsi-phy-28nm.h b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h new file mode 100644 index 000000000000..ab94d58377a1 --- /dev/null +++ b/include/dt-bindings/clock/qcom,dsi-phy-28nm.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ + +#ifndef _DT_BINDINGS_CLK_QCOM_DSI_PHY_28NM_H +#define _DT_BINDINGS_CLK_QCOM_DSI_PHY_28NM_H + +#define DSI_BYTE_PLL_CLK 0 +#define DSI_PIXEL_PLL_CLK 1 + +#endif
DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide two clocks. The respective clock ID is used by drivers and DTS, so it should be documented as explicit ABI. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Patch for Display tree, although with Ack from clock. --- .../devicetree/bindings/display/msm/dsi-phy-common.yaml | 2 ++ MAINTAINERS | 1 + include/dt-bindings/clock/qcom,dsi-phy-28nm.h | 9 +++++++++ 3 files changed, 12 insertions(+) create mode 100644 include/dt-bindings/clock/qcom,dsi-phy-28nm.h