| Message ID | 20250211104857.3501566-8-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm_i915_private to intel_display cleanup | expand |
On Tue, 11 Feb 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote: > Use intel_display instead of drm_i915_private for update_refclk hook. > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > .../drm/i915/display/intel_display_driver.c | 2 +- > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 32 +++++++++---------- > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +- > 3 files changed, 18 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c > index d448672fdfa4..978f530c810e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_driver.c > +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c > @@ -453,7 +453,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display) > > intel_update_czclk(i915); > intel_display_driver_init_hw(display); > - intel_dpll_update_ref_clks(i915); > + intel_dpll_update_ref_clks(display); > > if (display->cdclk.max_cdclk_freq == 0) > intel_update_max_cdclk(display); > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > index 104054a6df56..f94da1ffc8ce 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c > @@ -109,7 +109,7 @@ struct intel_dpll_mgr { > void (*update_active_dpll)(struct intel_atomic_state *state, > struct intel_crtc *crtc, > struct intel_encoder *encoder); > - void (*update_ref_clks)(struct drm_i915_private *i915); > + void (*update_ref_clks)(struct intel_display *display); > void (*dump_hw_state)(struct drm_printer *p, > const struct intel_dpll_hw_state *dpll_hw_state); > bool (*compare_hw_state)(const struct intel_dpll_hw_state *a, > @@ -1240,14 +1240,14 @@ static int hsw_get_dpll(struct intel_atomic_state *state, > return 0; > } > > -static void hsw_update_dpll_ref_clks(struct drm_i915_private *i915) > +static void hsw_update_dpll_ref_clks(struct intel_display *display) > { > - i915->display.dpll.ref_clks.ssc = 135000; > + display->dpll.ref_clks.ssc = 135000; > /* Non-SSC is only used on non-ULT HSW. */ > - if (intel_de_read(i915, FUSE_STRAP3) & HSW_REF_CLK_SELECT) > - i915->display.dpll.ref_clks.nssc = 24000; > + if (intel_de_read(display, FUSE_STRAP3) & HSW_REF_CLK_SELECT) > + display->dpll.ref_clks.nssc = 24000; > else > - i915->display.dpll.ref_clks.nssc = 135000; > + display->dpll.ref_clks.nssc = 135000; > } > > static void hsw_dump_hw_state(struct drm_printer *p, > @@ -1977,10 +1977,10 @@ static int skl_ddi_pll_get_freq(struct intel_display *display, > return skl_ddi_lcpll_get_freq(display, pll, dpll_hw_state); > } > > -static void skl_update_dpll_ref_clks(struct drm_i915_private *i915) > +static void skl_update_dpll_ref_clks(struct intel_display *display) > { > /* No SSC ref */ > - i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref; > + display->dpll.ref_clks.nssc = display->cdclk.hw.ref; > } > > static void skl_dump_hw_state(struct drm_printer *p, > @@ -2446,10 +2446,10 @@ static int bxt_get_dpll(struct intel_atomic_state *state, > return 0; > } > > -static void bxt_update_dpll_ref_clks(struct drm_i915_private *i915) > +static void bxt_update_dpll_ref_clks(struct intel_display *display) > { > - i915->display.dpll.ref_clks.ssc = 100000; > - i915->display.dpll.ref_clks.nssc = 100000; > + display->dpll.ref_clks.ssc = 100000; > + display->dpll.ref_clks.nssc = 100000; > /* DSI non-SSC ref 19.2MHz */ > } > > @@ -4078,10 +4078,10 @@ static void mg_pll_disable(struct intel_display *display, > icl_pll_disable(display, pll, enable_reg); > } > > -static void icl_update_dpll_ref_clks(struct drm_i915_private *i915) > +static void icl_update_dpll_ref_clks(struct intel_display *display) > { > /* No SSC ref */ > - i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref; > + display->dpll.ref_clks.nssc = display->cdclk.hw.ref; > } > > static void icl_dump_hw_state(struct drm_printer *p, > @@ -4532,10 +4532,10 @@ static void readout_dpll_hw_state(struct intel_display *display, > pll->info->name, pll->state.pipe_mask, pll->on); > } > > -void intel_dpll_update_ref_clks(struct drm_i915_private *i915) > +void intel_dpll_update_ref_clks(struct intel_display *display) > { > - if (i915->display.dpll.mgr && i915->display.dpll.mgr->update_ref_clks) > - i915->display.dpll.mgr->update_ref_clks(i915); > + if (display->dpll.mgr && display->dpll.mgr->update_ref_clks) > + display->dpll.mgr->update_ref_clks(display); > } > > void intel_dpll_readout_hw_state(struct intel_display *display) > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > index b6f2cbce13e4..3d988f17f31d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h > @@ -423,7 +423,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); > void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state); > void intel_shared_dpll_swap_state(struct intel_atomic_state *state); > void intel_shared_dpll_init(struct drm_i915_private *i915); > -void intel_dpll_update_ref_clks(struct drm_i915_private *i915); > +void intel_dpll_update_ref_clks(struct intel_display *display); > void intel_dpll_readout_hw_state(struct intel_display *display); > void intel_dpll_sanitize_state(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c index d448672fdfa4..978f530c810e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_driver.c +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c @@ -453,7 +453,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display) intel_update_czclk(i915); intel_display_driver_init_hw(display); - intel_dpll_update_ref_clks(i915); + intel_dpll_update_ref_clks(display); if (display->cdclk.max_cdclk_freq == 0) intel_update_max_cdclk(display); diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 104054a6df56..f94da1ffc8ce 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -109,7 +109,7 @@ struct intel_dpll_mgr { void (*update_active_dpll)(struct intel_atomic_state *state, struct intel_crtc *crtc, struct intel_encoder *encoder); - void (*update_ref_clks)(struct drm_i915_private *i915); + void (*update_ref_clks)(struct intel_display *display); void (*dump_hw_state)(struct drm_printer *p, const struct intel_dpll_hw_state *dpll_hw_state); bool (*compare_hw_state)(const struct intel_dpll_hw_state *a, @@ -1240,14 +1240,14 @@ static int hsw_get_dpll(struct intel_atomic_state *state, return 0; } -static void hsw_update_dpll_ref_clks(struct drm_i915_private *i915) +static void hsw_update_dpll_ref_clks(struct intel_display *display) { - i915->display.dpll.ref_clks.ssc = 135000; + display->dpll.ref_clks.ssc = 135000; /* Non-SSC is only used on non-ULT HSW. */ - if (intel_de_read(i915, FUSE_STRAP3) & HSW_REF_CLK_SELECT) - i915->display.dpll.ref_clks.nssc = 24000; + if (intel_de_read(display, FUSE_STRAP3) & HSW_REF_CLK_SELECT) + display->dpll.ref_clks.nssc = 24000; else - i915->display.dpll.ref_clks.nssc = 135000; + display->dpll.ref_clks.nssc = 135000; } static void hsw_dump_hw_state(struct drm_printer *p, @@ -1977,10 +1977,10 @@ static int skl_ddi_pll_get_freq(struct intel_display *display, return skl_ddi_lcpll_get_freq(display, pll, dpll_hw_state); } -static void skl_update_dpll_ref_clks(struct drm_i915_private *i915) +static void skl_update_dpll_ref_clks(struct intel_display *display) { /* No SSC ref */ - i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref; + display->dpll.ref_clks.nssc = display->cdclk.hw.ref; } static void skl_dump_hw_state(struct drm_printer *p, @@ -2446,10 +2446,10 @@ static int bxt_get_dpll(struct intel_atomic_state *state, return 0; } -static void bxt_update_dpll_ref_clks(struct drm_i915_private *i915) +static void bxt_update_dpll_ref_clks(struct intel_display *display) { - i915->display.dpll.ref_clks.ssc = 100000; - i915->display.dpll.ref_clks.nssc = 100000; + display->dpll.ref_clks.ssc = 100000; + display->dpll.ref_clks.nssc = 100000; /* DSI non-SSC ref 19.2MHz */ } @@ -4078,10 +4078,10 @@ static void mg_pll_disable(struct intel_display *display, icl_pll_disable(display, pll, enable_reg); } -static void icl_update_dpll_ref_clks(struct drm_i915_private *i915) +static void icl_update_dpll_ref_clks(struct intel_display *display) { /* No SSC ref */ - i915->display.dpll.ref_clks.nssc = i915->display.cdclk.hw.ref; + display->dpll.ref_clks.nssc = display->cdclk.hw.ref; } static void icl_dump_hw_state(struct drm_printer *p, @@ -4532,10 +4532,10 @@ static void readout_dpll_hw_state(struct intel_display *display, pll->info->name, pll->state.pipe_mask, pll->on); } -void intel_dpll_update_ref_clks(struct drm_i915_private *i915) +void intel_dpll_update_ref_clks(struct intel_display *display) { - if (i915->display.dpll.mgr && i915->display.dpll.mgr->update_ref_clks) - i915->display.dpll.mgr->update_ref_clks(i915); + if (display->dpll.mgr && display->dpll.mgr->update_ref_clks) + display->dpll.mgr->update_ref_clks(display); } void intel_dpll_readout_hw_state(struct intel_display *display) diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index b6f2cbce13e4..3d988f17f31d 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -423,7 +423,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state); void intel_shared_dpll_swap_state(struct intel_atomic_state *state); void intel_shared_dpll_init(struct drm_i915_private *i915); -void intel_dpll_update_ref_clks(struct drm_i915_private *i915); +void intel_dpll_update_ref_clks(struct intel_display *display); void intel_dpll_readout_hw_state(struct intel_display *display); void intel_dpll_sanitize_state(struct intel_display *display);
Use intel_display instead of drm_i915_private for update_refclk hook. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> --- .../drm/i915/display/intel_display_driver.c | 2 +- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 32 +++++++++---------- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +- 3 files changed, 18 insertions(+), 18 deletions(-)