| Message ID | 20250217-sm8650-v6-14-hmd-deckard-mdss-quad-upstream-oldbootwrapper-36-prep-v6-12-c11402574367@linaro.org (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | drm/msm/dpu: Support quad pipe with dual-DSI | expand |
On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote: > Currently, only 2 pipes are used at most for a plane. A stage structure > describes the configuration for a mixer pair. So only one stage is needed > for current usage cases. The quad-pipe case will be added in future and 2 > stages are used in the case. So extend the stage to an array with array size > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the > stage structure. > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + > 2 files changed, 30 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > struct dpu_hw_stage_cfg *stage_cfg > ) > { > - uint32_t lm_idx; > + uint32_t lm_idx, lm_in_pair; > enum dpu_sspp sspp_idx; > struct drm_plane_state *state; > > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; > > /* blend config update */ > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) > + lm_in_pair = num_mixers > 1 ? 2 : 1; > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); I almost missed this. Why is this necessary? > } > [...] > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) > mixer[i].mixer_op_mode, > ctl->idx - CTL_0); > > + /* > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. > + * There are 4 mixers at most. The first 2 are for the left half, and > + * the later 2 are for the right half. > + */ The comment is invalid until you introduce quad pipe, currently there are 2 mixers at most. However you can just say something like 'stage data is shared between PIPES_PER_STAGE pipes'. > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, > - &stage_cfg); > + &stage_cfg[i / PIPES_PER_STAGE]); > } > } > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > @@ -34,6 +34,7 @@ > #define DPU_MAX_PLANES 4 > #endif > > +#define STAGES_PER_PLANE 2 > #define PIPES_PER_PLANE 2 > #define PIPES_PER_STAGE 2 > #ifndef DPU_MAX_DE_CURVES > > -- > 2.34.1 >
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月18日周二 03:57写道： > > On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote: > > Currently, only 2 pipes are used at most for a plane. A stage structure > > describes the configuration for a mixer pair. So only one stage is needed > > for current usage cases. The quad-pipe case will be added in future and 2 > > stages are used in the case. So extend the stage to an array with array size > > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the > > stage structure. > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + > > 2 files changed, 30 insertions(+), 16 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > struct dpu_hw_stage_cfg *stage_cfg > > ) > > { > > - uint32_t lm_idx; > > + uint32_t lm_idx, lm_in_pair; > > enum dpu_sspp sspp_idx; > > struct drm_plane_state *state; > > > > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; > > > > /* blend config update */ > > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) > > + lm_in_pair = num_mixers > 1 ? 2 : 1; > > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) > > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); > > I almost missed this. Why is this necessary? It is protective code. In case there is only 1 LM, we should not iterate 2 LM in a stage. > > > } > > > > [...] > > > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) > > mixer[i].mixer_op_mode, > > ctl->idx - CTL_0); > > > > + /* > > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. > > + * There are 4 mixers at most. The first 2 are for the left half, and > > + * the later 2 are for the right half. > > + */ > > The comment is invalid until you introduce quad pipe, currently there > are 2 mixers at most. However you can just say something like 'stage > data is shared between PIPES_PER_STAGE pipes'. Accepted. > > > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, > > - &stage_cfg); > > + &stage_cfg[i / PIPES_PER_STAGE]); > > } > > } > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > @@ -34,6 +34,7 @@ > > #define DPU_MAX_PLANES 4 > > #endif > > > > +#define STAGES_PER_PLANE 2 > > #define PIPES_PER_PLANE 2 > > #define PIPES_PER_STAGE 2 > > #ifndef DPU_MAX_DE_CURVES > > > > -- > > 2.34.1 > > > > -- > With best wishes > Dmitry
On Thu, Feb 20, 2025 at 11:48:45PM +0800, Jun Nie wrote: > Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月18日周二 03:57写道： > > > > On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote: > > > Currently, only 2 pipes are used at most for a plane. A stage structure > > > describes the configuration for a mixer pair. So only one stage is needed > > > for current usage cases. The quad-pipe case will be added in future and 2 > > > stages are used in the case. So extend the stage to an array with array size > > > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the > > > stage structure. > > > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > > --- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + > > > 2 files changed, 30 insertions(+), 16 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > struct dpu_hw_stage_cfg *stage_cfg > > > ) > > > { > > > - uint32_t lm_idx; > > > + uint32_t lm_idx, lm_in_pair; > > > enum dpu_sspp sspp_idx; > > > struct drm_plane_state *state; > > > > > > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; > > > > > > /* blend config update */ > > > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) > > > + lm_in_pair = num_mixers > 1 ? 2 : 1; > > > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) > > > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); > > > > I almost missed this. Why is this necessary? > > It is protective code. In case there is only 1 LM, we should not > iterate 2 LM in a stage. That's not what the code does. > > > > > } > > > > > > > [...] > > > > > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) > > > mixer[i].mixer_op_mode, > > > ctl->idx - CTL_0); > > > > > > + /* > > > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. > > > + * There are 4 mixers at most. The first 2 are for the left half, and > > > + * the later 2 are for the right half. > > > + */ > > > > The comment is invalid until you introduce quad pipe, currently there > > are 2 mixers at most. However you can just say something like 'stage > > data is shared between PIPES_PER_STAGE pipes'. > > Accepted. > > > > > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, > > > - &stage_cfg); > > > + &stage_cfg[i / PIPES_PER_STAGE]); > > > } > > > } > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > @@ -34,6 +34,7 @@ > > > #define DPU_MAX_PLANES 4 > > > #endif > > > > > > +#define STAGES_PER_PLANE 2 BTW, This should be 1 for now. > > > #define PIPES_PER_PLANE 2 > > > #define PIPES_PER_STAGE 2 > > > #ifndef DPU_MAX_DE_CURVES > > > > > > -- > > > 2.34.1 > > > > > > > -- > > With best wishes > > Dmitry
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月21日周五 00:17写道： > > On Thu, Feb 20, 2025 at 11:48:45PM +0800, Jun Nie wrote: > > Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月18日周二 03:57写道： > > > > > > On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote: > > > > Currently, only 2 pipes are used at most for a plane. A stage structure > > > > describes the configuration for a mixer pair. So only one stage is needed > > > > for current usage cases. The quad-pipe case will be added in future and 2 > > > > stages are used in the case. So extend the stage to an array with array size > > > > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the > > > > stage structure. > > > > > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > > > --- > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + > > > > 2 files changed, 30 insertions(+), 16 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 > > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > > struct dpu_hw_stage_cfg *stage_cfg > > > > ) > > > > { > > > > - uint32_t lm_idx; > > > > + uint32_t lm_idx, lm_in_pair; > > > > enum dpu_sspp sspp_idx; > > > > struct drm_plane_state *state; > > > > > > > > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; > > > > > > > > /* blend config update */ > > > > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) > > > > + lm_in_pair = num_mixers > 1 ? 2 : 1; > > > > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) > > > > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); > > > > > > I almost missed this. Why is this necessary? > > > > It is protective code. In case there is only 1 LM, we should not > > iterate 2 LM in a stage. > > That's not what the code does. I do not get your iea. _dpu_crtc_blend_setup_pipe() is called with num_mixers set as: cstate->num_mixers - (stage * PIPES_PER_STAGE). So lm_in_pair will get the LM number in this stage to iterate. > > > > > > > > } > > > > > > > > > > [...] > > > > > > > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) > > > > mixer[i].mixer_op_mode, > > > > ctl->idx - CTL_0); > > > > > > > > + /* > > > > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. > > > > + * There are 4 mixers at most. The first 2 are for the left half, and > > > > + * the later 2 are for the right half. > > > > + */ > > > > > > The comment is invalid until you introduce quad pipe, currently there > > > are 2 mixers at most. However you can just say something like 'stage > > > data is shared between PIPES_PER_STAGE pipes'. > > > > Accepted. > > > > > > > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, > > > > - &stage_cfg); > > > > + &stage_cfg[i / PIPES_PER_STAGE]); > > > > } > > > > } > > > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 > > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > @@ -34,6 +34,7 @@ > > > > #define DPU_MAX_PLANES 4 > > > > #endif > > > > > > > > +#define STAGES_PER_PLANE 2 > > BTW, This should be 1 for now. Yeah, it can be added in the last patch. > > > > > #define PIPES_PER_PLANE 2 > > > > #define PIPES_PER_STAGE 2 > > > > #ifndef DPU_MAX_DE_CURVES > > > > > > > > -- > > > > 2.34.1 > > > > > > > > > > -- > > > With best wishes > > > Dmitry > > -- > With best wishes > Dmitry
On Fri, Feb 21, 2025 at 04:07:45PM +0800, Jun Nie wrote: > Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月21日周五 00:17写道： > > > > On Thu, Feb 20, 2025 at 11:48:45PM +0800, Jun Nie wrote: > > > Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 于2025年2月18日周二 03:57写道： > > > > > > > > On Mon, Feb 17, 2025 at 10:16:01PM +0800, Jun Nie wrote: > > > > > Currently, only 2 pipes are used at most for a plane. A stage structure > > > > > describes the configuration for a mixer pair. So only one stage is needed > > > > > for current usage cases. The quad-pipe case will be added in future and 2 > > > > > stages are used in the case. So extend the stage to an array with array size > > > > > STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the > > > > > stage structure. > > > > > > > > > > Signed-off-by: Jun Nie <jun.nie@linaro.org> > > > > > --- > > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- > > > > > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + > > > > > 2 files changed, 30 insertions(+), 16 deletions(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > > index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 > > > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > > > > > @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > > > struct dpu_hw_stage_cfg *stage_cfg > > > > > ) > > > > > { > > > > > - uint32_t lm_idx; > > > > > + uint32_t lm_idx, lm_in_pair; > > > > > enum dpu_sspp sspp_idx; > > > > > struct drm_plane_state *state; > > > > > > > > > > @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, > > > > > stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; > > > > > > > > > > /* blend config update */ > > > > > - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) > > > > > + lm_in_pair = num_mixers > 1 ? 2 : 1; > > > > > + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) > > > > > mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); > > > > > > > > I almost missed this. Why is this necessary? > > > > > > It is protective code. In case there is only 1 LM, we should not > > > iterate 2 LM in a stage. > > > > That's not what the code does. > > I do not get your iea. _dpu_crtc_blend_setup_pipe() is called with > num_mixers set as: > cstate->num_mixers - (stage * PIPES_PER_STAGE). > So lm_in_pair will get the LM number in this stage to iterate. You have written that it is incorrect to iterate over two LMs if we have one. The code does a different thing: 'don't iterate over more than two LMs'. It would be more idiomatic to write it as: lm_in_pair = min(num_mixers, 2); And then it is obvious that it is not 'lm_in_pair' (note, singular), but something like 'lms_in_stage'. I'd really ask you to pull this up to a caller function and pass a correct num_mixers instead. > > > > > > > > > > > } > > > > > > > > > > > > > [...] > > > > > > > > > @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) > > > > > mixer[i].mixer_op_mode, > > > > > ctl->idx - CTL_0); > > > > > > > > > > + /* > > > > > + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. > > > > > + * There are 4 mixers at most. The first 2 are for the left half, and > > > > > + * the later 2 are for the right half. > > > > > + */ > > > > > > > > The comment is invalid until you introduce quad pipe, currently there > > > > are 2 mixers at most. However you can just say something like 'stage > > > > data is shared between PIPES_PER_STAGE pipes'. > > > > > > Accepted. > > > > > > > > > ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, > > > > > - &stage_cfg); > > > > > + &stage_cfg[i / PIPES_PER_STAGE]); > > > > > } > > > > > } > > > > > > > > > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > > index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 > > > > > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > > > > > @@ -34,6 +34,7 @@ > > > > > #define DPU_MAX_PLANES 4 > > > > > #endif > > > > > > > > > > +#define STAGES_PER_PLANE 2 > > > > BTW, This should be 1 for now. > > Yeah, it can be added in the last patch. > > > > > > > #define PIPES_PER_PLANE 2 > > > > > #define PIPES_PER_STAGE 2 > > > > > #ifndef DPU_MAX_DE_CURVES > > > > > > > > > > -- > > > > > 2.34.1 > > > > > > > > > > > > > -- > > > > With best wishes > > > > Dmitry > > > > -- > > With best wishes > > Dmitry
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 81474823e6799132db71c9712046d359e3535d90..50acaf25a3ffcc94354faaa816fe74566784844c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -401,7 +401,7 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, struct dpu_hw_stage_cfg *stage_cfg ) { - uint32_t lm_idx; + uint32_t lm_idx, lm_in_pair; enum dpu_sspp sspp_idx; struct drm_plane_state *state; @@ -426,7 +426,8 @@ static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; /* blend config update */ - for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) + lm_in_pair = num_mixers > 1 ? 2 : 1; + for (lm_idx = 0; lm_idx < lm_in_pair; lm_idx++) mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); } @@ -442,7 +443,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, const struct msm_format *format; struct dpu_hw_ctl *ctl = mixer->lm_ctl; - uint32_t lm_idx, i; + uint32_t lm_idx, stage, i, pipe_idx, head_pipe_in_stage; bool bg_alpha_enable = false; DECLARE_BITMAP(fetch_active, SSPP_MAX); @@ -463,15 +464,22 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) bg_alpha_enable = true; - for (i = 0; i < PIPES_PER_PLANE; i++) { - if (!pstate->pipe[i].sspp) - continue; - set_bit(pstate->pipe[i].sspp->idx, fetch_active); - _dpu_crtc_blend_setup_pipe(crtc, plane, - mixer, cstate->num_mixers, - pstate->stage, - format, fb ? fb->modifier : 0, - &pstate->pipe[i], i, stage_cfg); + /* loop pipe per mixer pair with config in stage structure */ + for (stage = 0; stage < STAGES_PER_PLANE; stage++) { + head_pipe_in_stage = stage * PIPES_PER_STAGE; + for (i = 0; i < PIPES_PER_STAGE; i++) { + pipe_idx = i + head_pipe_in_stage; + if (!pstate->pipe[pipe_idx].sspp) + continue; + set_bit(pstate->pipe[pipe_idx].sspp->idx, fetch_active); + _dpu_crtc_blend_setup_pipe(crtc, plane, + &mixer[head_pipe_in_stage], + cstate->num_mixers - (stage * PIPES_PER_STAGE), + pstate->stage, + format, fb ? fb->modifier : 0, + &pstate->pipe[pipe_idx], i, + &stage_cfg[stage]); + } } /* blend config update */ @@ -503,7 +511,7 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) struct dpu_crtc_mixer *mixer = cstate->mixers; struct dpu_hw_ctl *ctl; struct dpu_hw_mixer *lm; - struct dpu_hw_stage_cfg stage_cfg; + struct dpu_hw_stage_cfg stage_cfg[STAGES_PER_PLANE]; int i; DRM_DEBUG_ATOMIC("%s\n", dpu_crtc->name); @@ -516,9 +524,9 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) } /* initialize stage cfg */ - memset(&stage_cfg, 0, sizeof(struct dpu_hw_stage_cfg)); + memset(&stage_cfg, 0, sizeof(stage_cfg)); - _dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer, &stage_cfg); + _dpu_crtc_blend_setup_mixer(crtc, dpu_crtc, mixer, stage_cfg); for (i = 0; i < cstate->num_mixers; i++) { ctl = mixer[i].lm_ctl; @@ -535,8 +543,13 @@ static void _dpu_crtc_blend_setup(struct drm_crtc *crtc) mixer[i].mixer_op_mode, ctl->idx - CTL_0); + /* + * call dpu_hw_ctl_setup_blendstage() to blend layers per stage cfg. + * There are 4 mixers at most. The first 2 are for the left half, and + * the later 2 are for the right half. + */ ctl->ops.setup_blendstage(ctl, mixer[i].hw_lm->idx, - &stage_cfg); + &stage_cfg[i / PIPES_PER_STAGE]); } } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h index 5f010d36672cc6440c69779908b315aab285eaf0..64e220987be5682f26d02074505c5474a547a814 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h @@ -34,6 +34,7 @@ #define DPU_MAX_PLANES 4 #endif +#define STAGES_PER_PLANE 2 #define PIPES_PER_PLANE 2 #define PIPES_PER_STAGE 2 #ifndef DPU_MAX_DE_CURVES
Currently, only 2 pipes are used at most for a plane. A stage structure describes the configuration for a mixer pair. So only one stage is needed for current usage cases. The quad-pipe case will be added in future and 2 stages are used in the case. So extend the stage to an array with array size STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the stage structure. Signed-off-by: Jun Nie <jun.nie@linaro.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 45 +++++++++++++++++++---------- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 + 2 files changed, 30 insertions(+), 16 deletions(-)