Message ID | 20250218105007.66358-10-biju.das.jz@bp.renesas.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | Add support for RZ/G3E CANFD | expand |
On 18.02.2025 10:49:59, Biju Das wrote: > The CAN-FD IP found on the RZ/G3E SoC is similar to R-Car Gen4, but > it has no external clock instead it has clk_ram, it has 6 channels > and supports 20 interrupts. Add support for RZ/G3E CAN-FD driver. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > drivers/net/can/rcar/rcar_canfd.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c > index d6d7ba3e9ca1..69ccd69f68dd 100644 > --- a/drivers/net/can/rcar/rcar_canfd.c > +++ b/drivers/net/can/rcar/rcar_canfd.c > @@ -607,6 +607,14 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { > .multi_channel_irqs = 1, > }; > > +static const struct rcar_canfd_hw_info r9a09g047_hw_info = { > + .max_channels = 6, > + .postdiv = 1, > + .multi_channel_irqs = 1, > + .gen4_type = 1, > + .only_internal_clks = 1, > +}; > + > /* Helper functions */ > static inline bool is_gen4(struct rcar_canfd_global *gpriv) > { > @@ -1861,6 +1869,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) > u32 rule_entry = 0; > bool fdmode = true; /* CAN FD only mode - default */ > char name[9] = "channelX"; > + struct clk *clk_ram; > int i; > > info = of_device_get_match_data(dev); > @@ -1950,6 +1959,11 @@ static int rcar_canfd_probe(struct platform_device *pdev) > gpriv->extclk = !gpriv->info->only_internal_clks; > } > > + clk_ram = devm_clk_get_optional_enabled(dev, "ram_clk"); This will keep the clock enabled, even if the interface is down. Do you care for a more fine grained clock handling? > + if (IS_ERR(clk_ram)) > + return dev_err_probe(dev, PTR_ERR(clk_ram), > + "cannot get ram clock\n"); > + > addr = devm_platform_ioremap_resource(pdev, 0); > if (IS_ERR(addr)) { > err = PTR_ERR(addr); > @@ -2112,6 +2126,7 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend, > > static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = { > { .compatible = "renesas,r8a779a0-canfd", .data = &rcar_gen4_hw_info }, > + { .compatible = "renesas,r9a09g047-canfd", .data = &r9a09g047_hw_info }, > { .compatible = "renesas,rcar-gen3-canfd", .data = &rcar_gen3_hw_info }, > { .compatible = "renesas,rcar-gen4-canfd", .data = &rcar_gen4_hw_info }, > { .compatible = "renesas,rzg2l-canfd", .data = &rzg2l_hw_info }, Marc
Hi Marc, Thanks for the feedback. > -----Original Message----- > From: Marc Kleine-Budde <mkl@pengutronix.de> > Sent: 18 February 2025 11:22 > Subject: Re: [PATCH 09/11] can: rcar_canfd: Add RZ/G3E support > > On 18.02.2025 10:49:59, Biju Das wrote: > > The CAN-FD IP found on the RZ/G3E SoC is similar to R-Car Gen4, but it > > has no external clock instead it has clk_ram, it has 6 channels and > > supports 20 interrupts. Add support for RZ/G3E CAN-FD driver. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > drivers/net/can/rcar/rcar_canfd.c | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > diff --git a/drivers/net/can/rcar/rcar_canfd.c > > b/drivers/net/can/rcar/rcar_canfd.c > > index d6d7ba3e9ca1..69ccd69f68dd 100644 > > --- a/drivers/net/can/rcar/rcar_canfd.c > > +++ b/drivers/net/can/rcar/rcar_canfd.c > > @@ -607,6 +607,14 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { > > .multi_channel_irqs = 1, > > }; > > > > +static const struct rcar_canfd_hw_info r9a09g047_hw_info = { > > + .max_channels = 6, > > + .postdiv = 1, > > + .multi_channel_irqs = 1, > > + .gen4_type = 1, > > + .only_internal_clks = 1, > > +}; > > + > > /* Helper functions */ > > static inline bool is_gen4(struct rcar_canfd_global *gpriv) { @@ > > -1861,6 +1869,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) > > u32 rule_entry = 0; > > bool fdmode = true; /* CAN FD only mode - default */ > > char name[9] = "channelX"; > > + struct clk *clk_ram; > > int i; > > > > info = of_device_get_match_data(dev); @@ -1950,6 +1959,11 @@ static > > int rcar_canfd_probe(struct platform_device *pdev) > > gpriv->extclk = !gpriv->info->only_internal_clks; > > } > > > > + clk_ram = devm_clk_get_optional_enabled(dev, "ram_clk"); > > This will keep the clock enabled, even if the interface is down. Do you care for a more fine grained > clock handling? I kept similar handling as "fck", which always enabled compared to fine grained clock handling like "can_clk" which enables/disables during open/close. I thought provide simple implementation for initial driver support to avoid any potential races with clk and then later plan to enhance it like more fine grained clock handling. Cheers, Biju > > > + if (IS_ERR(clk_ram)) > > + return dev_err_probe(dev, PTR_ERR(clk_ram), > > + "cannot get ram clock\n"); > > + > > addr = devm_platform_ioremap_resource(pdev, 0); > > if (IS_ERR(addr)) { > > err = PTR_ERR(addr); > > @@ -2112,6 +2126,7 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, > > rcar_canfd_suspend, > > > > static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = { > > { .compatible = "renesas,r8a779a0-canfd", .data = &rcar_gen4_hw_info > > }, > > + { .compatible = "renesas,r9a09g047-canfd", .data = > > +&r9a09g047_hw_info }, > > { .compatible = "renesas,rcar-gen3-canfd", .data = &rcar_gen3_hw_info }, > > { .compatible = "renesas,rcar-gen4-canfd", .data = &rcar_gen4_hw_info }, > > { .compatible = "renesas,rzg2l-canfd", .data = &rzg2l_hw_info }, > > Marc > > -- > Pengutronix e.K. | Marc Kleine-Budde | > Embedded Linux | https://www.pengutronix.de | > Vertretung Nürnberg | Phone: +49-5121-206917-129 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c index d6d7ba3e9ca1..69ccd69f68dd 100644 --- a/drivers/net/can/rcar/rcar_canfd.c +++ b/drivers/net/can/rcar/rcar_canfd.c @@ -607,6 +607,14 @@ static const struct rcar_canfd_hw_info rzg2l_hw_info = { .multi_channel_irqs = 1, }; +static const struct rcar_canfd_hw_info r9a09g047_hw_info = { + .max_channels = 6, + .postdiv = 1, + .multi_channel_irqs = 1, + .gen4_type = 1, + .only_internal_clks = 1, +}; + /* Helper functions */ static inline bool is_gen4(struct rcar_canfd_global *gpriv) { @@ -1861,6 +1869,7 @@ static int rcar_canfd_probe(struct platform_device *pdev) u32 rule_entry = 0; bool fdmode = true; /* CAN FD only mode - default */ char name[9] = "channelX"; + struct clk *clk_ram; int i; info = of_device_get_match_data(dev); @@ -1950,6 +1959,11 @@ static int rcar_canfd_probe(struct platform_device *pdev) gpriv->extclk = !gpriv->info->only_internal_clks; } + clk_ram = devm_clk_get_optional_enabled(dev, "ram_clk"); + if (IS_ERR(clk_ram)) + return dev_err_probe(dev, PTR_ERR(clk_ram), + "cannot get ram clock\n"); + addr = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(addr)) { err = PTR_ERR(addr); @@ -2112,6 +2126,7 @@ static SIMPLE_DEV_PM_OPS(rcar_canfd_pm_ops, rcar_canfd_suspend, static const __maybe_unused struct of_device_id rcar_canfd_of_table[] = { { .compatible = "renesas,r8a779a0-canfd", .data = &rcar_gen4_hw_info }, + { .compatible = "renesas,r9a09g047-canfd", .data = &r9a09g047_hw_info }, { .compatible = "renesas,rcar-gen3-canfd", .data = &rcar_gen3_hw_info }, { .compatible = "renesas,rcar-gen4-canfd", .data = &rcar_gen4_hw_info }, { .compatible = "renesas,rzg2l-canfd", .data = &rzg2l_hw_info },
The CAN-FD IP found on the RZ/G3E SoC is similar to R-Car Gen4, but it has no external clock instead it has clk_ram, it has 6 channels and supports 20 interrupts. Add support for RZ/G3E CAN-FD driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- drivers/net/can/rcar/rcar_canfd.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)