Message ID | 20250223194943.3518952-15-riel@surriel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | AMD broadcast TLB invalidation | expand |
On Sun, Feb 23, 2025 at 02:49:04PM -0500, Rik van Riel wrote: > Add a "noinvlpgb" commandline option to disable AMD > broadcast TLB flushing at boot time. See if clearcpuid= works too pls.
On Sun, 2025-02-23 at 22:29 +0100, Borislav Petkov wrote: > On Sun, Feb 23, 2025 at 02:49:04PM -0500, Rik van Riel wrote: > > Add a "noinvlpgb" commandline option to disable AMD > > broadcast TLB flushing at boot time. > > See if clearcpuid= works too pls. > What specifically are the things you want me to test here? Just that clearcpuid=419 properly disables INVLPGB, or also whether clearcpuid=145 (PCID) also automatically disables INVLPGB?
On Sun, Feb 23, 2025 at 07:34:03PM -0500, Rik van Riel wrote:
> What specifically are the things you want me to test here?
If clearcpuid= works too, there's no need for yet another "no<bla>" switch
which I'll have to janitor away a couple of releases later.
Thx.
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index fb8752b42ec8..91260e1949fb 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -4182,6 +4182,8 @@ nomodule Disable module load + noinvlpgb [X86-64,EARLY] Disable the INVLPGB cpu feature. + nonmi_ipi [X86] Disable using NMI IPIs during panic/reboot to shutdown the other cpus. Instead use the REBOOT_VECTOR irq. @@ -4190,6 +4192,7 @@ pagetables) support. nopcid [X86-64,EARLY] Disable the PCID cpu feature. + This also disables INVLPGB, which relies on PCID. nopku [X86] Disable Memory Protection Keys CPU feature found in some Intel CPUs. diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 7cce91b19fb2..b038c9b50b32 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -243,6 +243,33 @@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_page, gdt_page) = { .gdt = { } }; EXPORT_PER_CPU_SYMBOL_GPL(gdt_page); +#ifdef CONFIG_X86_BROADCAST_TLB_FLUSH +static void disable_invlpgb(void) +{ + /* do not emit a message if the feature is not present */ + if (!boot_cpu_has(X86_FEATURE_INVLPGB)) + return; + + setup_clear_cpu_cap(X86_FEATURE_INVLPGB); + pr_info("INVLPGB feature disabled\n"); +} + +static int __init x86_noinvlpgb_setup(char *s) +{ + /* noinvlpgb doesn't accept parameters */ + if (s) + return -EINVAL; + + disable_invlpgb(); + return 0; +} +early_param("noinvlpgb", x86_noinvlpgb_setup); +#else +static void disable_invlpgb(void) +{ +} +#endif + #ifdef CONFIG_X86_64 static int __init x86_nopcid_setup(char *s) { @@ -256,6 +283,7 @@ static int __init x86_nopcid_setup(char *s) setup_clear_cpu_cap(X86_FEATURE_PCID); pr_info("nopcid: PCID feature disabled\n"); + disable_invlpgb(); return 0; } early_param("nopcid", x86_nopcid_setup);
Add a "noinvlpgb" commandline option to disable AMD broadcast TLB flushing at boot time. Also fix up the "nopcid" boot option to automatically disable INVLPGB functionality, which relies on processes to run on globally allocated PCIDs. Signed-off-by: Rik van Riel <riel@surriel.com> Suggested-by: Brendan Jackman <jackmanb@google.com> --- .../admin-guide/kernel-parameters.txt | 3 ++ arch/x86/kernel/cpu/common.c | 28 +++++++++++++++++++ 2 files changed, 31 insertions(+)