| Message ID | 20250225-qps615_v4_1-v4-10-e08633a7bdf8@oss.qualcomm.com (mailing list archive) |
|---|---|
| State | New |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | PCI: Enable Power and configure the TC956x PCIe switch | expand |
On Tue, Feb 25, 2025 at 03:04:07PM +0530, Krishna Chaitanya Chundru wrote: > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt > to the host CPUs. This interrupt can be used by the device driver to > identify events such as PCIe link specific events, safety events, etc... > > Hence, add it to the PCIe RC node along with the existing MSI interrupts. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 25.02.2025 10:34 AM, Krishna Chaitanya Chundru wrote: > Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt > to the host CPUs. This interrupt can be used by the device driver to > identify events such as PCIe link specific events, safety events, etc... > > Hence, add it to the PCIe RC node along with the existing MSI interrupts. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- The computer tells me this one is wakeup-capable - is this something we are interested in describing for link up? Konrad
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index b2e2b1f26731..6d71353592c9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2225,9 +2225,10 @@ pcie1: pcie@1c08000 { <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi0", "msi1", "msi2", "msi3", - "msi4", "msi5", "msi6", "msi7"; + "msi4", "msi5", "msi6", "msi7", "global"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
Qcom PCIe RC controllers are capable of generating 'global' SPI interrupt to the host CPUs. This interrupt can be used by the device driver to identify events such as PCIe link specific events, safety events, etc... Hence, add it to the PCIe RC node along with the existing MSI interrupts. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)