diff mbox series

[v2,1/1] PPC: Activate UBSAN in testing

Message ID a1bc84821cf9018549fb1dc0aeb8fd8f9bfeb002.1740540262.git.sanastasio@raptorengineering.com (mailing list archive)
State New
Headers show
Series Enable UBSAN on ppc | expand

Commit Message

Shawn Anastasio Feb. 26, 2025, 3:27 a.m. UTC
From: Andrew Cooper <andrew.cooper3@citrix.com>

Also enable -fno-sanitize=alignment like x86 since support for unaligned
accesses is guaranteed by the ISA and the existing OPAL setup code
relies on it.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
---
Changes in v2:
  - Add -fno-sanitize=alignment flag per discussion in v1

 automation/gitlab-ci/build.yaml      | 3 +++
 xen/arch/ppc/Kconfig                 | 1 +
 xen/arch/ppc/arch.mk                 | 6 ++++++
 xen/arch/ppc/include/asm/processor.h | 2 ++
 xen/arch/ppc/stubs.c                 | 2 +-
 5 files changed, 13 insertions(+), 1 deletion(-)

--
2.30.2

Comments

Jan Beulich Feb. 26, 2025, 7:24 a.m. UTC | #1
On 26.02.2025 04:27, Shawn Anastasio wrote:
> From: Andrew Cooper <andrew.cooper3@citrix.com>
> 
> Also enable -fno-sanitize=alignment like x86 since support for unaligned
> accesses is guaranteed by the ISA and the existing OPAL setup code
> relies on it.
> 
> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
> Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>

Acked-by: Jan Beulich <jbeulich@suse.com>
Andrew Cooper Feb. 26, 2025, 12:10 p.m. UTC | #2
On 26/02/2025 7:24 am, Jan Beulich wrote:
> On 26.02.2025 04:27, Shawn Anastasio wrote:
>> From: Andrew Cooper <andrew.cooper3@citrix.com>
>>
>> Also enable -fno-sanitize=alignment like x86 since support for unaligned
>> accesses is guaranteed by the ISA and the existing OPAL setup code
>> relies on it.
>>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>> Signed-off-by: Shawn Anastasio <sanastasio@raptorengineering.com>
> Acked-by: Jan Beulich <jbeulich@suse.com>

Thanks. I've committed this.

Oleksii, seeing as how simple it ended up, and seeing as how you're
currently writing the release notes for 4.20 while excluding PPC from
the list...

Views on this sneaking in at the last moment?

~Andrew
Oleksii Kurochko Feb. 26, 2025, 12:53 p.m. UTC | #3
On 2/26/25 1:10 PM, Andrew Cooper wrote:
> On 26/02/2025 7:24 am, Jan Beulich wrote:
>> On 26.02.2025 04:27, Shawn Anastasio wrote:
>>> From: Andrew Cooper<andrew.cooper3@citrix.com>
>>>
>>> Also enable -fno-sanitize=alignment like x86 since support for unaligned
>>> accesses is guaranteed by the ISA and the existing OPAL setup code
>>> relies on it.
>>>
>>> Signed-off-by: Andrew Cooper<andrew.cooper3@citrix.com>
>>> Signed-off-by: Shawn Anastasio<sanastasio@raptorengineering.com>
>> Acked-by: Jan Beulich<jbeulich@suse.com>
> Thanks. I've committed this.
>
> Oleksii, seeing as how simple it ended up, and seeing as how you're
> currently writing the release notes for 4.20 while excluding PPC from
> the list...
>
> Views on this sneaking in at the last moment?

As it touches only PPC part, then I am okay to have it in 4.20:

   Release-Acked-By: Oleksii Kurochko<oleksii.kurochko@gmail.com>


I'll update release notes too then.

Thanks.

~ Oleksii
diff mbox series

Patch

diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml
index 35e224366f..6a2e491534 100644
--- a/automation/gitlab-ci/build.yaml
+++ b/automation/gitlab-ci/build.yaml
@@ -352,6 +352,9 @@  debian-12-ppc64le-gcc-debug:
     CONTAINER: debian:12-ppc64le
     KBUILD_DEFCONFIG: ppc64_defconfig
     HYPERVISOR_ONLY: y
+    EXTRA_XEN_CONFIG: |
+      CONFIG_UBSAN=y
+      CONFIG_UBSAN_FATAL=y

 debian-12-riscv64-gcc-debug:
   extends: .gcc-riscv64-cross-build-debug
diff --git a/xen/arch/ppc/Kconfig b/xen/arch/ppc/Kconfig
index 6db575a48d..917f5d53a6 100644
--- a/xen/arch/ppc/Kconfig
+++ b/xen/arch/ppc/Kconfig
@@ -2,6 +2,7 @@  config PPC
 	def_bool y
 	select FUNCTION_ALIGNMENT_4B
 	select HAS_DEVICE_TREE
+	select HAS_UBSAN
 	select HAS_VMAP

 config PPC64
diff --git a/xen/arch/ppc/arch.mk b/xen/arch/ppc/arch.mk
index 917ad0e6a8..c2ca419242 100644
--- a/xen/arch/ppc/arch.mk
+++ b/xen/arch/ppc/arch.mk
@@ -7,3 +7,9 @@  CFLAGS += -m64 -mlittle-endian -mcpu=$(ppc-march-y)
 CFLAGS += -mstrict-align -mcmodel=medium -mabi=elfv2 -fPIC -mno-altivec -mno-vsx -msoft-float

 LDFLAGS += -m elf64lppc
+
+ifeq ($(CONFIG_UBSAN),y)
+# Don't enable alignment sanitisation since Power ISA guarantees hardware
+# support for unaligned accesses.
+$(call cc-option-add,CFLAGS_UBSAN,CC,-fno-sanitize=alignment)
+endif
diff --git a/xen/arch/ppc/include/asm/processor.h b/xen/arch/ppc/include/asm/processor.h
index a01b62b8a4..50161cc32d 100644
--- a/xen/arch/ppc/include/asm/processor.h
+++ b/xen/arch/ppc/include/asm/processor.h
@@ -219,6 +219,8 @@  static inline void noreturn die(void)
  */
 #define cpu_relax() asm volatile ( "or %r1, %r1, %r1; or %r2, %r2, %r2" )

+#define dump_execution_state() run_in_exception_handler(show_execution_state)
+
 #endif /* __ASSEMBLY__ */

 #endif /* _ASM_PPC_PROCESSOR_H */
diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c
index fff82f5cf3..671e71aa0a 100644
--- a/xen/arch/ppc/stubs.c
+++ b/xen/arch/ppc/stubs.c
@@ -47,7 +47,7 @@  void send_timer_event(struct vcpu *v)

 void show_execution_state(const struct cpu_user_regs *regs)
 {
-    BUG_ON("unimplemented");
+    printk("TODO: Implement show_execution_state(regs)\n");
 }

 void arch_hypercall_tasklet_result(struct vcpu *v, long res)