| Message ID | 20250314173858.212264-6-ariel.dalessandro@collabora.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/panfrost: Add support for AARCH64_4K page table format | expand |
On Fri, 14 Mar 2025 14:38:57 -0300 Ariel D'Alessandro <ariel.dalessandro@collabora.com> wrote: > MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which > constantly faults with the current panfrost support. > > For instance, running `glmark2-es2-drm` benchmark test: > ``` > [ 79.617461] panfrost 13000000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0xaadc380, tail=0xaadc380 > [ 80.119811] panfrost 13000000.gpu: gpu sched timeout, js=0, config=0x7300, status=0x58, head=0xaaca180, tail=0xaaca180, sched_job=000000002fd03ccc > [ 80.129083] panfrost 13000000.gpu: Unhandled Page fault in AS0 at VA 0x0000000000000000 > [ 80.129083] Reason: TODO > [ 80.129083] raw fault status: 0x1C2 > [ 80.129083] decoded fault status: SLAVE FAULT > [ 80.129083] exception type 0xC2: TRANSLATION_FAULT_2 > [ 80.129083] access type 0x1: EXECUTE > [ 80.129083] source id 0x0 > ``` > > Note that current panfrost mode (Mali LPAE - LEGACY) only allows to > specify write-cache or implementation-defined as the caching policy, > probably not matching the right configuration. As depicted in the source > code: > > drivers/iommu/io-pgtable-arm.c: > ``` > * MEMATTR: Mali has no actual notion of a non-cacheable type, so the > * best we can do is mimic the out-of-tree driver and hope that the > * "implementation-defined caching policy" is good enough... > ``` > > Now that Panfrost supports AARCH64_4K page table format, let's enable it > on Mediatek MT8188 and configure the cache/shareability policies > properly. > > Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> > --- > drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c > index 0f3935556ac76..e854f290858f9 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_drv.c > +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c > @@ -824,6 +824,7 @@ static const struct panfrost_compatible mediatek_mt8188_data = { > .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), > .pm_domain_names = mediatek_mt8183_pm_domains, > .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), > + .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), > }; > > static const char * const mediatek_mt8192_supplies[] = { "mali", NULL };
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 0f3935556ac76..e854f290858f9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -824,6 +824,7 @@ static const struct panfrost_compatible mediatek_mt8188_data = { .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), .pm_domain_names = mediatek_mt8183_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), + .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; static const char * const mediatek_mt8192_supplies[] = { "mali", NULL };