| Message ID | 20250328-asyn-v11-5-ecc2d33aac69@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Expose modifiers/formats supported by async flips | expand |
On Fri, Mar 28, 2025 at 06:15:39PM +0530, Arun R Murthy wrote: > Async flip is not supported with Indexed 8 bit format as it depends on > LUT and can't be updated atomically. > > Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> Seems OK to me. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > index baa82d58900d38caf1420ce46ff6d1c003d12138..78dbbe5d1f293316dc097ce58275569eeed0b34b 100644 > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c > @@ -177,7 +177,8 @@ bool intel_plane_needs_physical(struct intel_plane *plane) > bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, > u64 modifier) > { > - if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier)) { > + if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier) || > + format == DRM_FORMAT_C8) { > drm_dbg_kms(plane->base.dev, > "[PLANE:%d:%s] Planar formats do not support async flips\n", > plane->base.base.id, plane->base.name); > > -- > 2.25.1
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index baa82d58900d38caf1420ce46ff6d1c003d12138..78dbbe5d1f293316dc097ce58275569eeed0b34b 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -177,7 +177,8 @@ bool intel_plane_needs_physical(struct intel_plane *plane) bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, u64 modifier) { - if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier)) { + if (intel_format_info_is_yuv_semiplanar(drm_format_info(format), modifier) || + format == DRM_FORMAT_C8) { drm_dbg_kms(plane->base.dev, "[PLANE:%d:%s] Planar formats do not support async flips\n", plane->base.base.id, plane->base.name);
Async flip is not supported with Indexed 8 bit format as it depends on LUT and can't be updated atomically. Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com> --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)