Message ID | 173d99afea37321e76e9380b49bd5966be8db849.1743772053.git.maciej.wieczor-retman@intel.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | [v3,01/14] kasan: sw_tags: Use arithmetic shift for shadow computation | expand |
On 4/4/25 06:14, Maciej Wieczor-Retman wrote: > Adjust x86 minimal SLAB alignment to match KASAN granularity size. In > tag-based mode the size changes to 16 bytes so the value needs to be 16. I feel like we need a _bit_ of a discussion of the impact here. We are, after all, trying to get this feature into shape so that it can be used more widely outside of just debugging environments. What's the impact of this in a production environment?
On 2025-04-04 at 09:59:49 -0700, Dave Hansen wrote: >On 4/4/25 06:14, Maciej Wieczor-Retman wrote: >> Adjust x86 minimal SLAB alignment to match KASAN granularity size. In >> tag-based mode the size changes to 16 bytes so the value needs to be 16. > >I feel like we need a _bit_ of a discussion of the impact here. We are, >after all, trying to get this feature into shape so that it can be used >more widely outside of just debugging environments. > >What's the impact of this in a production environment? I tried booting a fedora 41 on a Sierra Forest system with KASAN disabled (disabled only the reports so the 8 byte alignment doesn't cause a wall of debug information). Did so for both 8 byte alignment (default) and 16 byte alignment (added by the series). The differences looked mostly like noise, sometimes the higher alignment would use up a little bit less memory, sometimes a little bit more. I looked at all values in "cat /proc/meminfo". Is there some slab/slub benchmark for the kernel that would make sense to checkout here?
On 4/9/25 05:49, Maciej Wieczor-Retman wrote: > The differences looked mostly like noise, sometimes the higher alignment would > use up a little bit less memory, sometimes a little bit more. I looked at all > values in "cat /proc/meminfo". > > Is there some slab/slub benchmark for the kernel that would make sense to > checkout here? You don't need to benchmark anything. Just mention that it will waste memory and also give *some* ballpark estimate on how much. Just looking at your laptop's /proc/slabinfo would be a good start. Oh, and it wouldn't hurt to find out when and why the minimal slab alignment got dropped down to 8 bytes. I _thought_ it was higher at some point. Presumably there was a good reason for it and you're now undoing part of it.
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 69404eae9983..3232583b5487 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -21,4 +21,8 @@ #endif #endif +#ifdef CONFIG_KASAN_SW_TAGS +#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) +#endif + #endif /* _ASM_X86_CACHE_H */
Adjust x86 minimal SLAB alignment to match KASAN granularity size. In tag-based mode the size changes to 16 bytes so the value needs to be 16. Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> --- Changelog v3: - Fix typo in patch message 4 -> 16. - Change define location to arch/x86/include/asm/cache.c. arch/x86/include/asm/cache.h | 4 ++++ 1 file changed, 4 insertions(+)