| Message ID | 20250408171530.140858-1-mark.barnett@arm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | A mechanism for efficient support for per-function metrics | expand |
* mark.barnett@arm.com <mark.barnett@arm.com> wrote: > From: Mark Barnett <mark.barnett@arm.com> > > This patch introduces the concept of an alternating sample rate to perf > core and provides the necessary basic changes in the tools to activate > that option. > > The primary use case for this change is to be able to enable collecting > per-function performance metrics using the Arm PMU, as per the following > approach: > > * Starting with a simple periodic sampling (hotspot) profile, > augment each sample with PMU counters accumulated over a short window > up to the point the sample was taken. > * For each sample, perform some filtering to improve attribution of > the accumulated PMU counters (ensure they are attributed to a single > function) > * For each function accumulate a total for each PMU counter so that > metrics may be derived. > > Without modification, and sampling at a typical rate associated > with hotspot profiling (~1mS) leads to poor results. Such an > approach gives you a reasonable estimation of where the profiled > application is spending time for relatively low overhead, but the > PMU counters cannot easily be attributed to a single function as the > window over which they are collected is too large. A modern CPU may > execute many millions of instructions over many thousands of functions > within 1mS window. With this approach, the per-function metrics tend > to trend to some average value across the top N functions in the > profile. > > In order to ensure a reasonable likelihood that the counters are > attributed to a single function, the sampling window must be rather > short; typically something in the order of a few hundred cycles proves > well as tested on a range of aarch64 Cortex and Neoverse cores. > > As it stands, it is possible to achieve this with perf using a very high > sampling rate (e.g ~300cy), but there are at least three major concerns > with this approach: > > * For speculatively executing, out of order cores, can the results be > accurately attributed to a give function or the given sample window? > * A short sample window is not guaranteed to cover a single function. > * The overhead of sampling every few hundred cycles is very high and > is highly likely to cause throttling which is undesirable as it leads > to patchy results; i.e. the profile alternates between periods of > high frequency samples followed by longer periods of no samples. > > This patch does not address the first two points directly. Some means > to address those are discussed on the RFC v2 cover letter. The patch > focuses on addressing the final point, though happily this approach > gives us a way to perform basic filtering on the second point. > > The alternating sample period allows us to do two things: > > * We can control the risk of throttling and reduce overhead by > alternating between a long and short period. This allows us to > decouple the "periodic" sampling rate (as might be used for hotspot > profiling) from the short sampling window needed for collecting > the PMU counters. > * The sample taken at the end of the long period can be otherwise > discarded (as the PMU data is not useful), but the > PERF_RECORD_CALLCHAIN information can be used to identify the current > function at the start of the short sample window. This is useful > for filtering samples where the PMU counter data cannot be attributed > to a single function. > > There are several reasons why it is desirable to reduce the overhead and > risk of throttling: > > * PMU counter overflow typically causes an interrupt into the kernel; > this affects program runtime, and can affect things like branch > prediction, cache locality and so on which can skew the metrics. > * The very high sample rate produces significant amounts of data. > Depending on the configuration of the profiling session and machine, > it is easily possible to produce many orders of magnitude more data > which is costly for tools to post-process and increases the chance > of data loss. This is especially relevant on larger core count > systems where it is very easy to produce massive recordings. > Whilst the kernel will throttle such a configuration, > which helps to mitigate a large portion of the bandwidth and capture > overhead, it is not something that can be controlled for on a per > event basis, or for non-root users, and because throttling is > controlled as a percentage of time its affects vary from machine to > machine. AIUI throttling may also produce an uneven temporal > distribution of samples. Finally, whilst throttling does a good job > at reducing the overall amount of data produced, it still leads to > much larger captures than with this method; typically we have > observed 1-2 orders of magnitude larger captures. > > This patch set modifies perf core to support alternating between two > sample_period values, providing a simple and inexpensive way for tools > to separate out the sample window (time over which events are > counted) from the sample period (time between interesting samples). Upstreaming path: ================= So, while this looks interesting and it might work, a big problem as I see it is to get tools to use it: the usual kernel feature catch-22. So I think a hard precondition for an upstream merge would be for the usage of this new ABI to be built into 'perf top/record' and used by default, so the kernel side code gets tested and verified - and our default profiling output would improve rather substantially as well. ABI details: ============ I'd propose a couple of common-sense extensions to the ABI: 1) I think a better approach would be to also batch the short periods, i.e. instead of interleaved long-short periods: L S L S L we'd support batches of short periods: L SSSS L SSSS L SSSS L SSSS As long as the long periods are 'long enough', throttling wouldn't (or, at least, shouldn't) trigger. (If throttling triggers, it's the throttling code that needs to be fixed.) This means that your proposed ABI would also require an additional parameter: [long,short,batch-count]. Your current proposal is basically [long,short,1]. Advantages of batching the short periods (let's coin it 'burst-profiling'?) would be: - Performance: the caching of the profiling machinery, which would reduce the per-short-sample overhead rather substantially I believe. With your current approach we bring all that code into CPU caches and use it 1-2 times for a single data record, which is kind of a waste. - Data quality: batching increases the effective data rate of 'relevant' short samples, with very little overall performance impact. By tuning the long-period and the batch length the overall tradeoff between profiling overhead and amount of data extracted can be finetuned pretty well IMHO. (Tools might even opt to discard the first 'short' sample to decouple it from the first cache-cold execution of the perf machinery.) 2) I agree with the random-jitter approach as well, to remove short-period sampling artifacts that may arise out of the period length resonating with the execution time of key code sequences, especially in the 2-3 digits long integers sampling period spectrum, but maybe it should be expressed in terms of a generic period length, not as a random 4-bit parameter overlaid on another parameter. Ie. the ABI would be something like: [period_long, period_short, period_jitter, batch_count] I see no reason why the random jitter has to be necessarily 4 bits short, and it could apply to the 'long' periods as well. Obviously this all complicates the math on the tooling side a bit. ;-) If data size is a concern: there's no real need to save space all that much on the perf_attr ABI side: it's a setup/configuration structure, not a per sample field where every bit counts. Implementation: =============== Instead of making it an entirely different mode, we could allow period_long to be zero, and map regular periodic events to [0,period_short,0,1], or so? But only if that simplifies/unifies the code. Summary: ======== Anyway, would something like this work for you? I think the most important aspect is to demonstrate working tooling side. Good thing we have tools/perf/ in-tree for exactly such purposes. ;-) Thanks, Ingo
On Tue, Apr 08, 2025 at 06:15:25PM +0100, mark.barnett@arm.com wrote: > perf record -T --sample-cpu --call-graph fp,4 --user-callchains \ > -k CLOCK_MONOTONIC_RAW \ > -e '{cycles/period=999700,alt-period=300/,instructions,branch-misses,cache-references,cache-misses}:uS' \ > benchmark 0 1 > perf record -i -vvv -e '{cycles/period=999700,alt-period=300/,instructions}:uS' benchmark 0 1 Should be updated to read something like: cycles/period=1000000,hf-period=300/ right? Also, cycles/freq=1000,hf-period=300/ should now also work, right? Anyway, the kernel bits look good to me now (with the nits fixed), so: Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
On 4/9/25 15:29, Peter Zijlstra wrote: > On Tue, Apr 08, 2025 at 06:15:25PM +0100, mark.barnett@arm.com wrote: > >> perf record -T --sample-cpu --call-graph fp,4 --user-callchains \ >> -k CLOCK_MONOTONIC_RAW \ >> -e '{cycles/period=999700,alt-period=300/,instructions,branch-misses,cache-references,cache-misses}:uS' \ >> benchmark 0 1 > >> perf record -i -vvv -e '{cycles/period=999700,alt-period=300/,instructions}:uS' benchmark 0 1 > > Should be updated to read something like: > > cycles/period=1000000,hf-period=300/ > > right? > > Also, cycles/freq=1000,hf-period=300/ should now also work, right? > > Anyway, the kernel bits look good to me now (with the nits fixed), so: > > Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Yes, freq works. I'll update the cover letter and address the nits in the next submission. Thanks!
On 4/9/25 12:38, Ingo Molnar wrote: > > * mark.barnett@arm.com <mark.barnett@arm.com> wrote: > >> From: Mark Barnett <mark.barnett@arm.com> >> >> This patch introduces the concept of an alternating sample rate to perf >> core and provides the necessary basic changes in the tools to activate >> that option. >> >> The primary use case for this change is to be able to enable collecting >> per-function performance metrics using the Arm PMU, as per the following >> approach: >> >> * Starting with a simple periodic sampling (hotspot) profile, >> augment each sample with PMU counters accumulated over a short window >> up to the point the sample was taken. >> * For each sample, perform some filtering to improve attribution of >> the accumulated PMU counters (ensure they are attributed to a single >> function) >> * For each function accumulate a total for each PMU counter so that >> metrics may be derived. >> >> Without modification, and sampling at a typical rate associated >> with hotspot profiling (~1mS) leads to poor results. Such an >> approach gives you a reasonable estimation of where the profiled >> application is spending time for relatively low overhead, but the >> PMU counters cannot easily be attributed to a single function as the >> window over which they are collected is too large. A modern CPU may >> execute many millions of instructions over many thousands of functions >> within 1mS window. With this approach, the per-function metrics tend >> to trend to some average value across the top N functions in the >> profile. >> >> In order to ensure a reasonable likelihood that the counters are >> attributed to a single function, the sampling window must be rather >> short; typically something in the order of a few hundred cycles proves >> well as tested on a range of aarch64 Cortex and Neoverse cores. >> >> As it stands, it is possible to achieve this with perf using a very high >> sampling rate (e.g ~300cy), but there are at least three major concerns >> with this approach: >> >> * For speculatively executing, out of order cores, can the results be >> accurately attributed to a give function or the given sample window? >> * A short sample window is not guaranteed to cover a single function. >> * The overhead of sampling every few hundred cycles is very high and >> is highly likely to cause throttling which is undesirable as it leads >> to patchy results; i.e. the profile alternates between periods of >> high frequency samples followed by longer periods of no samples. >> >> This patch does not address the first two points directly. Some means >> to address those are discussed on the RFC v2 cover letter. The patch >> focuses on addressing the final point, though happily this approach >> gives us a way to perform basic filtering on the second point. >> >> The alternating sample period allows us to do two things: >> >> * We can control the risk of throttling and reduce overhead by >> alternating between a long and short period. This allows us to >> decouple the "periodic" sampling rate (as might be used for hotspot >> profiling) from the short sampling window needed for collecting >> the PMU counters. >> * The sample taken at the end of the long period can be otherwise >> discarded (as the PMU data is not useful), but the >> PERF_RECORD_CALLCHAIN information can be used to identify the current >> function at the start of the short sample window. This is useful >> for filtering samples where the PMU counter data cannot be attributed >> to a single function. >> >> There are several reasons why it is desirable to reduce the overhead and >> risk of throttling: >> >> * PMU counter overflow typically causes an interrupt into the kernel; >> this affects program runtime, and can affect things like branch >> prediction, cache locality and so on which can skew the metrics. >> * The very high sample rate produces significant amounts of data. >> Depending on the configuration of the profiling session and machine, >> it is easily possible to produce many orders of magnitude more data >> which is costly for tools to post-process and increases the chance >> of data loss. This is especially relevant on larger core count >> systems where it is very easy to produce massive recordings. >> Whilst the kernel will throttle such a configuration, >> which helps to mitigate a large portion of the bandwidth and capture >> overhead, it is not something that can be controlled for on a per >> event basis, or for non-root users, and because throttling is >> controlled as a percentage of time its affects vary from machine to >> machine. AIUI throttling may also produce an uneven temporal >> distribution of samples. Finally, whilst throttling does a good job >> at reducing the overall amount of data produced, it still leads to >> much larger captures than with this method; typically we have >> observed 1-2 orders of magnitude larger captures. >> >> This patch set modifies perf core to support alternating between two >> sample_period values, providing a simple and inexpensive way for tools >> to separate out the sample window (time over which events are >> counted) from the sample period (time between interesting samples). > > Upstreaming path: > ================= > > So, while this looks interesting and it might work, a big problem as I > see it is to get tools to use it: the usual kernel feature catch-22. > > So I think a hard precondition for an upstream merge would be for the > usage of this new ABI to be built into 'perf top/record' and used by > default, so the kernel side code gets tested and verified - and our > default profiling output would improve rather substantially as well. > > ABI details: > ============ > > I'd propose a couple of common-sense extensions to the ABI: > > 1) > > I think a better approach would be to also batch the short periods, > i.e. instead of interleaved long-short periods: > > L S L S L > > we'd support batches of short periods: > > L SSSS L SSSS L SSSS L SSSS > > As long as the long periods are 'long enough', throttling wouldn't > (or, at least, shouldn't) trigger. (If throttling triggers, it's the > throttling code that needs to be fixed.) > > This means that your proposed ABI would also require an additional > parameter: [long,short,batch-count]. Your current proposal is basically > [long,short,1]. > > Advantages of batching the short periods (let's coin it > 'burst-profiling'?) would be: > > - Performance: the caching of the profiling machinery, which would > reduce the per-short-sample overhead rather substantially I believe. > With your current approach we bring all that code into CPU caches > and use it 1-2 times for a single data record, which is kind of a > waste. > > - Data quality: batching increases the effective data rate of > 'relevant' short samples, with very little overall performance > impact. By tuning the long-period and the batch length the overall > tradeoff between profiling overhead and amount of data extracted can > be finetuned pretty well IMHO. (Tools might even opt to discard the > first 'short' sample to decouple it from the first cache-cold > execution of the perf machinery.) > > 2) > > I agree with the random-jitter approach as well, to remove short-period > sampling artifacts that may arise out of the period length resonating > with the execution time of key code sequences, especially in the 2-3 > digits long integers sampling period spectrum, but maybe it should be > expressed in terms of a generic period length, not as a random 4-bit > parameter overlaid on another parameter. > > Ie. the ABI would be something like: > > [period_long, period_short, period_jitter, batch_count] > > I see no reason why the random jitter has to be necessarily 4 bits > short, and it could apply to the 'long' periods as well. Obviously this > all complicates the math on the tooling side a bit. ;-) > > If data size is a concern: there's no real need to save space all that > much on the perf_attr ABI side: it's a setup/configuration structure, > not a per sample field where every bit counts. > > Implementation: > =============== > > Instead of making it an entirely different mode, we could allow > period_long to be zero, and map regular periodic events to > [0,period_short,0,1], or so? But only if that simplifies/unifies the > code. > > Summary: > ======== > > Anyway, would something like this work for you? I think the most > important aspect is to demonstrate working tooling side. Good thing > we have tools/perf/ in-tree for exactly such purposes. ;-) > > Thanks, > > Ingo Thanks, Ingo, for the detailed notes. Your feedback is very much appreciated. Tool Integration ================== We've been using a python script to process the data into a report. We can look at implementing this directly in perf report, if that is required. However, I'm nervous about making the new feature the default behaviour for the tool. This feature has been integrated into our tools [1] for the last 12 months, and has received a lot of testing on Arm Neoverse hardware. Other platforms have received less rigorous testing. In my opinion, more work would be needed to validate the PMU hardware & software characteristics of other architectures before this can be made the default. Burst Sampling ================ I like the burst sampling idea. Increased I-Cache pressure is an inherent weakness of this sampling method, and this would help to alleviate that somewhat. I'll add this in the next spin. Period Jitter =============== Yes, we can apply this to both periods. I will make that change. I'm not sure I've fully understood your suggestion here. In its current state, the 4-bit jitter field acts as a base-2 exponent. This gives us a random jitter value of up to 2**15. Is the suggestion to change this to a fixed, absolute value that can be applied to both long & short periods? Thanks, Mark [1] https://developer.arm.com/documentation/109847/9-3/Overview-of-Streamline-CLI-Tools
On Fri, Apr 11, 2025 at 4:08 AM Mark Barnett <mark.barnett@arm.com> wrote: > Tool Integration > ================== > > We've been using a python script to process the data into a report. We > can look at implementing this directly in perf report, if that is > required. However, I'm nervous about making the new feature the default > behaviour for the tool. > > This feature has been integrated into our tools [1] for the last 12 > months, and has received a lot of testing on Arm Neoverse hardware. > Other platforms have received less rigorous testing. In my opinion, more > work would be needed to validate the PMU hardware & software > characteristics of other architectures before this can be made the default. Hi Mark, Wrt testing, in v6.14 we've fixed up the python scripting with perf a bit more and there is an example that parses an event and then dumps samples here: https://web.git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/python/tracepoint.py?h=perf-tools-next There is also the perf script integration for things like flame graphs: https://web.git.kernel.org/pub/scm/linux/kernel/git/perf/perf-tools-next.git/tree/tools/perf/scripts/python/flamegraph.py?h=perf-tools-next#n96 I don't think work should be gated on cleaning up perf report, top, etc. which still needs clean up for things like hybrid events. As the histograms should use the sample's period then I believe things should just work in much the same way as leader sampling can work. It'd be worth checking. Thanks, Ian
* Mark Barnett <mark.barnett@arm.com> wrote: > Tool Integration > ================== > > We've been using a python script to process the data into a report. We can > look at implementing this directly in perf report, if that is required. > However, I'm nervous about making the new feature the default behaviour for > the tool. That's OK - but it should be very simple to activate for perf record/top. A single option or so to get some sane default behavior, without having to micro-manage the period values? In particular perf defaults to 4000 Hz auto-freq samples (at least on my x86 devel box), and it would be nice to make this new feature work well with the freq representation too, without complicating it too much. > This feature has been integrated into our tools [1] for the last 12 > months, and has received a lot of testing on Arm Neoverse hardware. > Other platforms have received less rigorous testing. In my opinion, > more work would be needed to validate the PMU hardware & software > characteristics of other architectures before this can be made the > default. Sure. As long as the switch is simple, I think it will be a popular change once the kernel feature goes upstream. In other words: please add a simple, idiot-proof switch to perf top/record for maintainers with chronically short attention spans who want to try out your kernel feature. ;) Please Cc: the perf tooling people to those changes, in general they are very open to such features. > Burst Sampling > ================ > > I like the burst sampling idea. Increased I-Cache pressure is an inherent > weakness of this sampling method, and this would help to alleviate that > somewhat. I'll add this in the next spin. Great, thanks! > Period Jitter > =============== > > Yes, we can apply this to both periods. I will make that change. > > I'm not sure I've fully understood your suggestion here. In its > current state, the 4-bit jitter field acts as a base-2 exponent. This > gives us a random jitter value of up to 2**15. Is the suggestion to > change this to a fixed, absolute value that can be applied to both > long & short periods? Oh, I missed the base-2 exponent aspect, I assumed it was a flat period in the small integers range, a kind of micro-jitter to counter resonance with the finest CPU microarchitectural base-frequencies. What is the typical useful jitter range in your experience? base-2 exponents sound a bit too limiting - although the prandom32() indeed smears it between [0..2^param). I'd guess that jitter would rarely want to be larger than the long-period? (Although that might not always be the case.) I'd generally err on the side of being a bit too generic & generous in the design of ABI parameters, because we never know what people will use it for ... Within reason that is. Thanks, Ingo
* Ian Rogers <irogers@google.com> wrote: > I don't think work should be gated on cleaning up perf report, top, > etc. which still needs clean up for things like hybrid events. As the > histograms should use the sample's period then I believe things > should just work in much the same way as leader sampling can work. > It'd be worth checking. Yeah, so I think burst-profiling is basically still a single-event profiling mode - with a tooling-side filter that skips the long-periods and includes the burst-periods, and transforms all the statistics and counts to make sense in the usual perf context. Ie. I don't think it should be overly intrusive, and it could be a nice performance & profiling quality feature we'd consider using by default eventually. Thanks, Ingo
From: Mark Barnett <mark.barnett@arm.com> This patch introduces the concept of an alternating sample rate to perf core and provides the necessary basic changes in the tools to activate that option. The primary use case for this change is to be able to enable collecting per-function performance metrics using the Arm PMU, as per the following approach: * Starting with a simple periodic sampling (hotspot) profile, augment each sample with PMU counters accumulated over a short window up to the point the sample was taken. * For each sample, perform some filtering to improve attribution of the accumulated PMU counters (ensure they are attributed to a single function) * For each function accumulate a total for each PMU counter so that metrics may be derived. Without modification, and sampling at a typical rate associated with hotspot profiling (~1mS) leads to poor results. Such an approach gives you a reasonable estimation of where the profiled application is spending time for relatively low overhead, but the PMU counters cannot easily be attributed to a single function as the window over which they are collected is too large. A modern CPU may execute many millions of instructions over many thousands of functions within 1mS window. With this approach, the per-function metrics tend to trend to some average value across the top N functions in the profile. In order to ensure a reasonable likelihood that the counters are attributed to a single function, the sampling window must be rather short; typically something in the order of a few hundred cycles proves well as tested on a range of aarch64 Cortex and Neoverse cores. As it stands, it is possible to achieve this with perf using a very high sampling rate (e.g ~300cy), but there are at least three major concerns with this approach: * For speculatively executing, out of order cores, can the results be accurately attributed to a give function or the given sample window? * A short sample window is not guaranteed to cover a single function. * The overhead of sampling every few hundred cycles is very high and is highly likely to cause throttling which is undesirable as it leads to patchy results; i.e. the profile alternates between periods of high frequency samples followed by longer periods of no samples. This patch does not address the first two points directly. Some means to address those are discussed on the RFC v2 cover letter. The patch focuses on addressing the final point, though happily this approach gives us a way to perform basic filtering on the second point. The alternating sample period allows us to do two things: * We can control the risk of throttling and reduce overhead by alternating between a long and short period. This allows us to decouple the "periodic" sampling rate (as might be used for hotspot profiling) from the short sampling window needed for collecting the PMU counters. * The sample taken at the end of the long period can be otherwise discarded (as the PMU data is not useful), but the PERF_RECORD_CALLCHAIN information can be used to identify the current function at the start of the short sample window. This is useful for filtering samples where the PMU counter data cannot be attributed to a single function. There are several reasons why it is desirable to reduce the overhead and risk of throttling: * PMU counter overflow typically causes an interrupt into the kernel; this affects program runtime, and can affect things like branch prediction, cache locality and so on which can skew the metrics. * The very high sample rate produces significant amounts of data. Depending on the configuration of the profiling session and machine, it is easily possible to produce many orders of magnitude more data which is costly for tools to post-process and increases the chance of data loss. This is especially relevant on larger core count systems where it is very easy to produce massive recordings. Whilst the kernel will throttle such a configuration, which helps to mitigate a large portion of the bandwidth and capture overhead, it is not something that can be controlled for on a per event basis, or for non-root users, and because throttling is controlled as a percentage of time its affects vary from machine to machine. AIUI throttling may also produce an uneven temporal distribution of samples. Finally, whilst throttling does a good job at reducing the overall amount of data produced, it still leads to much larger captures than with this method; typically we have observed 1-2 orders of magnitude larger captures. This patch set modifies perf core to support alternating between two sample_period values, providing a simple and inexpensive way for tools to separate out the sample window (time over which events are counted) from the sample period (time between interesting samples). It is expected to be used with the cycle counter event, alternating between a long and short period and subsequently discarding the counter data for samples with the long period. The combined long and short period gives the overall sampling period, and the short sample period gives the sample window. The symbol taken from the sample at the end of the long period can be used by tools to ensure correct attribution as described previously. The cycle counter is recommended as it provides fair temporal distribution of samples as would be required for the per-symbol sample count mentioned previously, and because the PMU can be programmed to overflow after a sufficiently short window (which may not be possible with software timer, for example). This patch does not restrict to only the cycle counter, it is possible there could be other novel uses based on different events, or more appropriate counters on other architectures. This patch set does not modify or otherwise disable the kernel's existing throttling behaviour; if a configuration is given that would lead high CPU usage, then throttling still occurs. To test this a simple `perf script` based python script was developed. For a limited set of Arm PMU events it will post process a `perf record`-ing and generate a table of metrics. Along side this a benchmark application was developed that rotates through a sequence of different classes of behaviour that can be detected by the Arm PMU (eg. mispredicts, cache misses, different instruction mixes). The path through the benchmark can be rotated after each iteration so as to ensure the results don't land on some lucky harmonic with the sample period. The script can be used with and without this patch allowing comparison of the results. Testing was on Juno (A53+A57), N1SDP, Gravaton 2 and 3. In addition this approach has been applied to a few of Arm's tools projects and has correctly identified improvements and regressions. Headline results from testing indicate that ~300 cycles sample window gives good results with or without this patch. Typical output on N1SDP (Neoverse-N1) for the provided benchmark when run as: perf record -T --sample-cpu --call-graph fp,4 --user-callchains \ -k CLOCK_MONOTONIC_RAW \ -e '{cycles/period=999700,alt-period=300/,instructions,branch-misses,cache-references,cache-misses}:uS' \ benchmark 0 1 perf script -s generate-function-metrics.py -- -s discard Looks like (reformatted for email brevity): Symbol # CPI BM/KI CM/KI %CM %CY %I %BM %L1DA %L1DM fp_divider_stalls 6553 4.9 0.0 0.0 0.0 41.8 22.9 0.1 0.6 0.0 int_divider_stalls 4741 3.5 0.0 0.0 1.1 28.3 21.5 0.1 1.9 0.2 isb 3414 20.1 0.2 0.0 0.4 17.6 2.3 0.1 0.8 0.0 branch_mispredicts 1234 1.1 33.0 0.0 0.0 6.1 15.2 99.0 71.6 0.1 double_to_int 694 0.5 0.0 0.0 0.6 3.4 19.1 0.1 1.2 0.1 nops 417 0.3 0.2 0.0 2.8 1.9 18.3 0.6 0.4 0.1 dcache_miss 185 3.6 0.4 184.7 53.8 0.7 0.5 0.0 18.4 99.1 (CPI = Cycles/Instruction, BM/KI = Branch Misses per 1000 Instruction, CM/KI = Cache Misses per 1000 Instruction, %CM = Percent of Cache accesses that miss, %CY = Percentage of total cycles, %I = Percentage of total instructions, %BM = Percentage of total branch mispredicts, %L1DA = Percentage of total cache accesses, %L1DM = Percentage of total cache misses) When the patch is used, the resulting `perf.data` files are typically between 25-50x smaller than without, and take ~25x less time for the python script to post-process. For example, running the following: perf record -i -vvv -e '{cycles/period=1000000/,instructions}:uS' benchmark 0 1 perf record -i -vvv -e '{cycles/period=1000/,instructions}:uS' benchmark 0 1 perf record -i -vvv -e '{cycles/period=300/,instructions}:uS' benchmark 0 1 produces captures on N1SDP (Neoverse-N1) of the following sizes: * period=1000000: 2.601 MB perf.data (55780 samples), script time = 0m0.362s * period=1000: 283.749 MB perf.data (6162932 samples), script time = 0m33.100s * period=300: 304.281 MB perf.data (6614182 samples), script time = 0m35.826s The "script time" is the user time from running "time perf script -s generate-function-metrics.py" on the recording. Similar processing times were observed for "time perf report --stdio|cat" as well. By comparison, with the patch active: perf record -i -vvv -e '{cycles/period=999700,alt-period=300/,instructions}:uS' benchmark 0 1 produces 4.923 MB perf.data (107512 samples), and script time = 0m0.578s. Which is as expected ~2x the size and ~2x the number of samples as per the period=1000000 recording. When compared to the period=300 recording, the results from the provided post-processing script are (within margin of error) the same, but the data file is ~62x smaller. The same affect is seen for the post-processing script runtime. Notably, without the patch enable, L1D cache miss rates are often higher than with, which we attribute to increased impact on the cache that trapping into the kernel every 300 cycles has. These results are given with `perf_cpu_time_max_percent=25`. When tested with `perf_cpu_time_max_percent=100` the size and time comparisons are more significant. Disabling throttling did not lead to obvious improvements in the collected metrics, suggesting that the sampling approach is sufficient to collect representative metrics. Cursory testing on a Xeon(R) W-2145 with a 300 *instruction* sample window (with and without the patch) suggests this approach might work for some counters. Using the same test script, it was possible to identify branch mispredicts correctly. However, whilst the patch is functionally correct, differences in the architectures may mean that this approach it enables does not apply as a means to collect per-function metrics on x86. Changes since v3: - Rebased onto v6.15-rc1. - Refactored to use 'high-frequency period' naming instead of 'alternate period', using interface changes suggested by Peter Zijlstra. Note: This introduces a 'sample_period_state' field to hw_perf_event, rather than making use of the 'state' field. I went this way because there was no clear ownership for the the contents of 'state' - many drivers completely clear and assign to the field without preserving existing bit flags set elsewhere. - eBPF handling in __perf_event_overflow moved to a later point in the function so that sample period updates continue to happen, even if an eBPF filter is active. - hf-period injection now works with frequency-based sampling. - Changed jitter functionality to use prandom_u32_state instead of get_random_u32_below. Changes since v2: - Rebased onto latest perf-tools-next. - Reordered patch series so that "Record sample last_period before updating" applies first. - Addressed issue reported by LKP tests. - Addressed review comments from Leo Yan. Changes since v1: - Rebased onto perf-tools-next, as per request from Ian Rogers. - Removed unnecessary code that truncated period_left to 0 and restarted the PMU. - Renamed variables to use the shorter 'alt_period' instead of 'alterantive_period'. - Addressed review comments from Leo Yan. - Added patch #5 that addresses an issue in the x86 and PowerPC drivers that caused the opposite period to be reported in the sample record. Changes since RFC v2: - Rebased on v6.12-rc6. Changes since RFC v1: - Rebased on v6.9-rc1. - Refactored from arm_pmu based extension to core feature - Added the ability to jitter the sample window based on feedback from Andi Kleen. - Modified perf tool to parse the "alt-period" and "alt-period-jitter" terms in the event specification. Ben Gainey (4): perf: Allow periodic events to alternate between two sample periods perf: Allow adding fixed random jitter to the sampling period tools/perf: Modify event parser to support hf-period term tools/perf: Modify event parser to support hf-rand term Mark Barnett (1): perf: Record sample last_period before updating arch/powerpc/perf/core-book3s.c | 3 +- arch/powerpc/perf/core-fsl-emb.c | 3 +- arch/x86/events/core.c | 4 +- arch/x86/events/intel/core.c | 5 +- arch/x86/events/intel/knc.c | 4 +- include/linux/perf_event.h | 13 ++- include/uapi/linux/perf_event.h | 10 ++ kernel/events/core.c | 95 +++++++++++++++++-- tools/include/uapi/linux/perf_event.h | 10 ++ tools/perf/tests/shell/attr/base-record | 4 +- tools/perf/tests/shell/attr/base-record-spe | 2 + tools/perf/tests/shell/attr/base-stat | 4 +- tools/perf/tests/shell/attr/system-wide-dummy | 4 +- .../tests/shell/attr/test-record-dummy-C0 | 4 +- .../shell/attr/test-record-hf-period-rand | 13 +++ .../shell/attr/test-record-hf-period-term | 12 +++ tools/perf/tests/shell/lib/attr.py | 2 + tools/perf/util/evsel.c | 2 + tools/perf/util/parse-events.c | 30 ++++++ tools/perf/util/parse-events.h | 4 +- tools/perf/util/parse-events.l | 2 + tools/perf/util/perf_event_attr_fprintf.c | 2 + tools/perf/util/pmu.c | 4 +- 23 files changed, 216 insertions(+), 20 deletions(-) create mode 100644 tools/perf/tests/shell/attr/test-record-hf-period-rand create mode 100644 tools/perf/tests/shell/attr/test-record-hf-period-term