diff mbox

[v3,30/32] PCI/tsi721: use PCIe capabilities access functions to simplify implementation

Message ID 1343836477-7287-31-git-send-email-jiang.liu@huawei.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Jiang Liu Aug. 1, 2012, 3:54 p.m. UTC 
From: Jiang Liu <jiang.liu@huawei.com>

Use PCIe capabilities access functions to simplify tsi721 driver's
implementation.

Signed-off-by: Jiang Liu <liuj97@gmail.com>
---
 drivers/rapidio/devices/tsi721.c |   19 +++++++------------
 1 file changed, 7 insertions(+), 12 deletions(-)

Comments

Bounine, Alexandre Aug. 9, 2012, 2:16 p.m. UTC | #1 
> Sent: Wednesday, August 01, 2012 11:55 AM
> Subject: [PATCH v3 30/32] PCI/tsi721: use PCIe capabilities access
> functions to simplify implementation
> 
> From: Jiang Liu <jiang.liu@huawei.com>
> 
> Use PCIe capabilities access functions to simplify tsi721 driver's
> implementation.
> 
> Signed-off-by: Jiang Liu <liuj97@gmail.com>
> ---
>  drivers/rapidio/devices/tsi721.c |   19 +++++++------------
>  1 file changed, 7 insertions(+), 12 deletions(-)
> 

Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
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diff mbox

Patch

diff --git a/drivers/rapidio/devices/tsi721.c b/drivers/rapidio/devices/tsi721.c
index 722246c..5970c43 100644
--- a/drivers/rapidio/devices/tsi721.c
+++ b/drivers/rapidio/devices/tsi721.c
@@ -2212,9 +2212,8 @@  static int __devinit tsi721_probe(struct pci_dev *pdev,
 				  const struct pci_device_id *id)
 {
 	struct tsi721_device *priv;
-	int i, cap;
+	int i;
 	int err;
-	u32 regval;
 
 	priv = kzalloc(sizeof(struct tsi721_device), GFP_KERNEL);
 	if (priv == NULL) {
@@ -2320,20 +2319,16 @@  static int __devinit tsi721_probe(struct pci_dev *pdev,
 			dev_info(&pdev->dev, "Unable to set consistent DMA mask\n");
 	}
 
-	cap = pci_pcie_cap(pdev);
-	BUG_ON(cap == 0);
+	BUG_ON(!pci_is_pcie(pdev));
 
 	/* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */
-	pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &regval);
-	regval &= ~(PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
-		    PCI_EXP_DEVCTL_NOSNOOP_EN);
-	regval |= 0x2 << MAX_READ_REQUEST_SZ_SHIFT;
-	pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL, regval);
+	pci_pcie_capability_change_dword(pdev, PCI_EXP_DEVCTL,
+		0x2 << MAX_READ_REQUEST_SZ_SHIFT,
+		PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN |
+		PCI_EXP_DEVCTL_NOSNOOP_EN);
 
 	/* Adjust PCIe completion timeout. */
-	pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL2, &regval);
-	regval &= ~(0x0f);
-	pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL2, regval | 0x2);
+	pci_pcie_capability_change_dword(pdev, PCI_EXP_DEVCTL2, 0x2, 0xf);
 
 	/*
 	 * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block