[04/04] sh: prefetch early exception data on sh3/sh4/sh4a

Commit Message

Magnus Damm Feb. 23, 2009, 7:19 a.m. UTC

From: Magnus Damm <[e-mail]>

Prefetch early exception data. There is unused space in our
exception handler cache line anyway, so this is almost free.

Signed-off-by: Magnus Damm <[e-mail]>
---

 arch/sh/kernel/cpu/sh3/entry.S |    7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

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Comments

Paul Mundt Feb. 27, 2009, 7:22 a.m. UTC | #1

On Mon, Feb 23, 2009 at 04:19:31PM +0900, Magnus Damm wrote:
> From: Magnus Damm <[e-mail]>
> 
> Prefetch early exception data. There is unused space in our
> exception handler cache line anyway, so this is almost free.
> 
Hmm, this won't work, 'pref' doesn't exist on SH-3. The binutils opcode
table defines it as arch_sh2a_nofpu_or_sh4_nommu_nofpu_up, which excludes
SH-3. mova is ok, though.

This does show how often SH-3 gets tested though, as asm/processor_32.h
happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
and drop in a PREF() macro.
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Magnus Damm Feb. 27, 2009, 7:53 a.m. UTC | #2

On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
> On Mon, Feb 23, 2009 at 04:19:31PM +0900, Magnus Damm wrote:
>> From: Magnus Damm <[e-mail]>
>>
>> Prefetch early exception data. There is unused space in our
>> exception handler cache line anyway, so this is almost free.
>>
> Hmm, this won't work, 'pref' doesn't exist on SH-3. The binutils opcode
> table defines it as arch_sh2a_nofpu_or_sh4_nommu_nofpu_up, which excludes
> SH-3. mova is ok, though.
>
> This does show how often SH-3 gets tested though, as asm/processor_32.h
> happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
> and drop in a PREF() macro.

Right, I do recall building for hp6xx at some point. Thanks for fixing it up.

/ magnus
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Paul Mundt March 2, 2009, 2:30 a.m. UTC | #3

On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
> On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
> > On Mon, Feb 23, 2009 at 04:19:31PM +0900, Magnus Damm wrote:
> >> From: Magnus Damm <[e-mail]>
> >>
> >> Prefetch early exception data. There is unused space in our
> >> exception handler cache line anyway, so this is almost free.
> >>
> > Hmm, this won't work, 'pref' doesn't exist on SH-3. The binutils opcode
> > table defines it as arch_sh2a_nofpu_or_sh4_nommu_nofpu_up, which excludes
> > SH-3. mova is ok, though.
> >
> > This does show how often SH-3 gets tested though, as asm/processor_32.h
> > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
> > and drop in a PREF() macro.
> 
> Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
> 
The fact that that didn't blow up on the opcode is likely because the
toolchain you were using had no idea about SH-3 ISA tuning, and so fell
back on an anything-goes tuning policy. If you are building for exotic
combinations, always do a single run with V=1 to make sure that the
CFLAGS are sticking and doing what you think they are doing.

There are far more people building SH-3 targetted kernels with an SH-4+
specific toolchain than there are actual SH-3 users, the latter of which
tend to only provide feedback a few times a year. This unfortunately
means that these sorts of bugs can be long lived and tedious to bisect at
a later point in time, but there is not much that can be done about that.
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Paul Mundt March 2, 2009, 2:47 a.m. UTC | #4

On Mon, Mar 02, 2009 at 11:48:15AM +0900, Magnus Damm wrote:
> On Mon, Mar 2, 2009 at 11:30 AM, Paul Mundt <[e-mail]> wrote:
> > On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
> >> On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
> >> > This does show how often SH-3 gets tested though, as asm/processor_32.h
> >> > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
> >> > and drop in a PREF() macro.
> >>
> >> Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
> >>
> > The fact that that didn't blow up on the opcode is likely because the
> > toolchain you were using had no idea about SH-3 ISA tuning, and so fell
> > back on an anything-goes tuning policy. If you are building for exotic
> > combinations, always do a single run with V=1 to make sure that the
> > CFLAGS are sticking and doing what you think they are doing.
> 
> Hm, what about extending the makefiles to check for SH-3 support?
> Or maybe that's impossible or takes too long time to implement.
> 
I don't think you fully appreciate the sheer amount of work we do in the
kernel Makefiles to work around GCC's stupidity. Give arch/sh/Makefile a
read first.
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Magnus Damm March 2, 2009, 2:48 a.m. UTC | #5

On Mon, Mar 2, 2009 at 11:30 AM, Paul Mundt <[e-mail]> wrote:
> On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
>> On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
>> > This does show how often SH-3 gets tested though, as asm/processor_32.h
>> > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
>> > and drop in a PREF() macro.
>>
>> Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
>>
> The fact that that didn't blow up on the opcode is likely because the
> toolchain you were using had no idea about SH-3 ISA tuning, and so fell
> back on an anything-goes tuning policy. If you are building for exotic
> combinations, always do a single run with V=1 to make sure that the
> CFLAGS are sticking and doing what you think they are doing.

Hm, what about extending the makefiles to check for SH-3 support?
Or maybe that's impossible or takes too long time to implement.

> There are far more people building SH-3 targetted kernels with an SH-4+
> specific toolchain than there are actual SH-3 users, the latter of which
> tend to only provide feedback a few times a year. This unfortunately
> means that these sorts of bugs can be long lived and tedious to bisect at
> a later point in time, but there is not much that can be done about that.

I guess that checking for CFLAGS in the makefiles is out of the question then..

/ magnus
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Magnus Damm March 2, 2009, 2:55 a.m. UTC | #6

On Mon, Mar 2, 2009 at 11:47 AM, Paul Mundt <[e-mail]> wrote:
> On Mon, Mar 02, 2009 at 11:48:15AM +0900, Magnus Damm wrote:
>> On Mon, Mar 2, 2009 at 11:30 AM, Paul Mundt <[e-mail]> wrote:
>> > On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
>> >> On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
>> >> > This does show how often SH-3 gets tested though, as asm/processor_32.h
>> >> > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
>> >> > and drop in a PREF() macro.
>> >>
>> >> Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
>> >>
>> > The fact that that didn't blow up on the opcode is likely because the
>> > toolchain you were using had no idea about SH-3 ISA tuning, and so fell
>> > back on an anything-goes tuning policy. If you are building for exotic
>> > combinations, always do a single run with V=1 to make sure that the
>> > CFLAGS are sticking and doing what you think they are doing.
>>
>> Hm, what about extending the makefiles to check for SH-3 support?
>> Or maybe that's impossible or takes too long time to implement.
>>
> I don't think you fully appreciate the sheer amount of work we do in the
> kernel Makefiles to work around GCC's stupidity. Give arch/sh/Makefile a
> read first.

Ok, ok. We do a lot of magic already. I've seen more hairy stuff
elsewhere though. I'll shut up. =)

/ magnus
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Kristoffer Ericson March 16, 2009, noon UTC | #7

On Mon, 2 Mar 2009 11:30:13 +0900
Paul Mundt <[e-mail]> wrote:

> On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
> > On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
> > > On Mon, Feb 23, 2009 at 04:19:31PM +0900, Magnus Damm wrote:
> > >> From: Magnus Damm <[e-mail]>
> > >>
> > >> Prefetch early exception data. There is unused space in our
> > >> exception handler cache line anyway, so this is almost free.
> > >>
> > > Hmm, this won't work, 'pref' doesn't exist on SH-3. The binutils opcode
> > > table defines it as arch_sh2a_nofpu_or_sh4_nommu_nofpu_up, which excludes
> > > SH-3. mova is ok, though.
> > >
> > > This does show how often SH-3 gets tested though, as asm/processor_32.h
> > > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
> > > and drop in a PREF() macro.
> > 
> > Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
> > 
> The fact that that didn't blow up on the opcode is likely because the
> toolchain you were using had no idea about SH-3 ISA tuning, and so fell
> back on an anything-goes tuning policy. If you are building for exotic
> combinations, always do a single run with V=1 to make sure that the
> CFLAGS are sticking and doing what you think they are doing.
> 
> There are far more people building SH-3 targetted kernels with an SH-4+
> specific toolchain than there are actual SH-3 users, the latter of which
> tend to only provide feedback a few times a year. This unfortunately
> means that these sorts of bugs can be long lived and tedious to bisect at
> a later point in time, but there is not much that can be done about that.
> --

I usually build a couple of kernels per month for the hp6xx (sh3) so the biggest
stuff kernel wise usually gets caught there. I however use an old sh3 toolchain so
gcc stuff often runs me by. Lack of time to fix the hd64461 mfd driver is probably the main
reason why hp6xx isnt more in sync currently.
If theres anything specific you want to test just shout. I keep an close eye
on the mailinglists even if I dont say much :)



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Paul Mundt March 16, 2009, 12:50 p.m. UTC | #8

On Mon, Mar 16, 2009 at 01:00:47PM +0100, Kristoffer Ericson wrote:
> On Mon, 2 Mar 2009 11:30:13 +0900
> Paul Mundt <[e-mail]> wrote:
> > On Fri, Feb 27, 2009 at 04:53:00PM +0900, Magnus Damm wrote:
> > > On Fri, Feb 27, 2009 at 4:22 PM, Paul Mundt <[e-mail]> wrote:
> > > > This does show how often SH-3 gets tested though, as asm/processor_32.h
> > > > happily defines prefetch() for SH-3 when it shouldn't. I'll tidy this up
> > > > and drop in a PREF() macro.
> > > 
> > > Right, I do recall building for hp6xx at some point. Thanks for fixing it up.
> > > 
> > 
[snip]

> > There are far more people building SH-3 targetted kernels with an SH-4+
> > specific toolchain than there are actual SH-3 users, the latter of which
> > tend to only provide feedback a few times a year. This unfortunately
> > means that these sorts of bugs can be long lived and tedious to bisect at
> > a later point in time, but there is not much that can be done about that.
> 
> I usually build a couple of kernels per month for the hp6xx (sh3) so the biggest
> stuff kernel wise usually gets caught there. I however use an old sh3 toolchain so
> gcc stuff often runs me by. Lack of time to fix the hd64461 mfd driver is probably the main
> reason why hp6xx isnt more in sync currently.
> If theres anything specific you want to test just shout. I keep an close eye
> on the mailinglists even if I dont say much :)
> 
The entire purpose of this thread is to show that _building_ is not the
issue, as various SH-3 targets are built daily by multiple people with
multiple compilers and multiple trees. The issue is with testing. The
platforms with a close to single user userbase suffer from the problem
that the only time we get any feedback is when something has broken,
usually months after the fact. There is no easy way to solve this issue
though, it is just something to be aware of. When issues do pop up, they
will be fixed in turn, but are not likely to be prioritized. Jumping in
when things are being worked on and integrated early on gaurantees that
those issues are fixed immediately.
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Patch

--- 0007/arch/sh/kernel/cpu/sh3/entry.S
+++ work/arch/sh/kernel/cpu/sh3/entry.S	2009-02-23 14:18:48.000000000 +0900
@@ -463,9 +463,11 @@  tlb_miss:
 	sts	pr, k3		! save original pr value in k3
 
 handle_exception:
+	mova	exception_data, k0
+
 	! Setup stack and save DSP context (k0 contains original r15 on return)
 	bsr	prepare_stack_save_dsp
-	 nop
+	 pref	@k0
 
 	! Save registers / Switch to bank 0
 	mov.l	5f, k2		! vector register address
@@ -556,10 +558,11 @@  ENTRY(handle_interrupt)
 11:
 #endif /* defined(CONFIG_KGDB) */
 	sts	pr, k3		! save original pr value in k3
+	mova	exception_data, k0
 
 	! Setup stack and save DSP context (k0 contains original r15 on return)
 	bsr	prepare_stack_save_dsp
-	 nop
+	 pref	@k0
 
 	! Save registers / Switch to bank 0
 	bsr	save_regs	! needs original pr value in k3