[2/2] ARM: OMAP5: Enable arch timer support

Commit Message

Santosh Shilimkar Sept. 11, 2012, 9:29 a.m. UTC

Benoit,

On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
<[e-mail]> wrote:
> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>

[...]

>> >> Silly question: Don't we have one arch-timer per CPU?
>> >>
>> > It is per CPU just like A9 TWD
>>
>> Shouldn't we have two nodes then?
>>
> I need to check this but arch timer DT node should be same
> as the twd DT node. May be one node with reference to
> each CPU node should do but am not too sure about the DT
> nodes and how all that work.
>
Here is an updated patch based on our discussion. Thanks for comments.
Let me know if you are ok with this version.


From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <[e-mail]>
Date: Mon, 13 Aug 2012 14:39:03 +0530
Subject: [PATCH] ARM: OMAP5: Enable arch timer support

Enable Cortex A15 generic timer support for OMAP5 based SOCs.
The CPU local timers run on the free running real time counter clock.

Signed-off-by: Santosh Shilimkar <[e-mail]>
---
 arch/arm/boot/dts/omap5.dtsi |   12 ++++++++++++
 arch/arm/mach-omap2/Kconfig  |    1 +
 arch/arm/mach-omap2/timer.c  |    7 +++++++
 3 files changed, 20 insertions(+)

Comments

Benoit Cousson Sept. 13, 2012, 8:56 a.m. UTC | #1

Hi Santosh,

On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
> Benoit,
> 
> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
> <[e-mail]> wrote:
>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>>
> 
> [...]
> 
>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>
>>>> It is per CPU just like A9 TWD
>>>
>>> Shouldn't we have two nodes then?
>>>
>> I need to check this but arch timer DT node should be same
>> as the twd DT node. May be one node with reference to
>> each CPU node should do but am not too sure about the DT
>> nodes and how all that work.
>>
> Here is an updated patch based on our discussion. Thanks for comments.
> Let me know if you are ok with this version.

Cool, thanks for the update.

> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
> From: Santosh Shilimkar <[e-mail]>
> Date: Mon, 13 Aug 2012 14:39:03 +0530
> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
> 
> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
> The CPU local timers run on the free running real time counter clock.
> 
> Signed-off-by: Santosh Shilimkar <[e-mail]>

Acked-by: Benoit Cousson <[e-mail]>

Tony,

I can potentially add it along with the timer changes in the dts part2
series if you ack the timer patch. We don't have tons of OMAP5 content
in the dts branch so it should not conflict.

Regards,
Benoit

> ---
>  arch/arm/boot/dts/omap5.dtsi |   12 ++++++++++++
>  arch/arm/mach-omap2/Kconfig  |    1 +
>  arch/arm/mach-omap2/timer.c  |    7 +++++++
>  3 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
> index 57e5270..7b986ed 100644
> --- a/arch/arm/boot/dts/omap5.dtsi
> +++ b/arch/arm/boot/dts/omap5.dtsi
> @@ -33,9 +33,21 @@
>  	cpus {
>  		cpu@0 {
>  			compatible = "arm,cortex-a15";
> +			timer {
> +				compatible = "arm,armv7-timer";
> +				/* 14th PPI IRQ, active low level-sensitive */
> +				interrupts = <1 14 0x308>;
> +				clock-frequency = <6144000>;
> +			};
>  		};
>  		cpu@1 {
>  			compatible = "arm,cortex-a15";
> +			timer {
> +				compatible = "arm,armv7-timer";
> +				/* 14th PPI IRQ, active low level-sensitive */
> +				interrupts = <1 14 0x308>;
> +				clock-frequency = <6144000>;
> +			};
>  		};
>  	};
> 
> diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
> index 2120f90..53fb77c 100644
> --- a/arch/arm/mach-omap2/Kconfig
> +++ b/arch/arm/mach-omap2/Kconfig
> @@ -73,6 +73,7 @@ config SOC_OMAP5
>  	select ARM_GIC
>  	select HAVE_SMP
>  	select SOC_HAS_REALTIME_COUNTER
> +	select ARM_ARCH_TIMER
> 
>  comment "OMAP Core Type"
>  	depends on ARCH_OMAP2
> diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
> index 8f5b88b..46982d0 100644
> --- a/arch/arm/mach-omap2/timer.c
> +++ b/arch/arm/mach-omap2/timer.c
> @@ -41,6 +41,7 @@
>  #include <plat/dmtimer.h>
>  #include <asm/smp_twd.h>
>  #include <asm/sched_clock.h>
> +#include <asm/arch_timer.h>
>  #include "common.h"
>  #include <plat/omap_hwmod.h>
>  #include <plat/omap_device.h>
> @@ -481,9 +482,15 @@ OMAP_SYS_TIMER(4)
>  #ifdef CONFIG_SOC_OMAP5
>  static void __init omap5_timer_init(void)
>  {
> +	int err;
> +
>  	omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
>  	omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
>  	realtime_counter_init();
> +
> +	err = arch_timer_of_register();
> +	if (err)
> +		pr_err("%s: arch_timer_register failed %d\n", __func__, err);
>  }
>  OMAP_SYS_TIMER(5)
>  #endif
> 

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Santosh Shilimkar Sept. 13, 2012, 9 a.m. UTC | #2

On Thu, Sep 13, 2012 at 2:26 PM, Benoit Cousson <[e-mail]> wrote:
> Hi Santosh,
>
> On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
>> Benoit,
>>
>> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
>> <[e-mail]> wrote:
>>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>>>
>>
>> [...]
>>
>>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>>
>>>>> It is per CPU just like A9 TWD
>>>>
>>>> Shouldn't we have two nodes then?
>>>>
>>> I need to check this but arch timer DT node should be same
>>> as the twd DT node. May be one node with reference to
>>> each CPU node should do but am not too sure about the DT
>>> nodes and how all that work.
>>>
>> Here is an updated patch based on our discussion. Thanks for comments.
>> Let me know if you are ok with this version.
>
> Cool, thanks for the update.
>
>> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
>> From: Santosh Shilimkar <[e-mail]>
>> Date: Mon, 13 Aug 2012 14:39:03 +0530
>> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
>>
>> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>> The CPU local timers run on the free running real time counter clock.
>>
>> Signed-off-by: Santosh Shilimkar <[e-mail]>
>
> Acked-by: Benoit Cousson <[e-mail]>
>
Thanks Benoit.

> Tony,
>
> I can potentially add it along with the timer changes in the dts part2
> series if you ack the timer patch. We don't have tons of OMAP5 content
> in the dts branch so it should not conflict.
>
Yep. let me know what works. if needed I can put these two patches
on a branch and send a pull request.

Regards
santosh
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Benoit Cousson Sept. 13, 2012, 9:27 a.m. UTC | #3

On 09/13/2012 11:00 AM, Shilimkar, Santosh wrote:
> On Thu, Sep 13, 2012 at 2:26 PM, Benoit Cousson <[e-mail]> wrote:
>> Hi Santosh,
>>
>> On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
>>> Benoit,
>>>
>>> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
>>> <[e-mail]> wrote:
>>>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>>>>
>>>
>>> [...]
>>>
>>>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>>>
>>>>>> It is per CPU just like A9 TWD
>>>>>
>>>>> Shouldn't we have two nodes then?
>>>>>
>>>> I need to check this but arch timer DT node should be same
>>>> as the twd DT node. May be one node with reference to
>>>> each CPU node should do but am not too sure about the DT
>>>> nodes and how all that work.
>>>>
>>> Here is an updated patch based on our discussion. Thanks for comments.
>>> Let me know if you are ok with this version.
>>
>> Cool, thanks for the update.
>>
>>> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
>>> From: Santosh Shilimkar <[e-mail]>
>>> Date: Mon, 13 Aug 2012 14:39:03 +0530
>>> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
>>>
>>> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>>> The CPU local timers run on the free running real time counter clock.
>>>
>>> Signed-off-by: Santosh Shilimkar <[e-mail]>
>>
>> Acked-by: Benoit Cousson <[e-mail]>
>>
> Thanks Benoit.
> 
>> Tony,
>>
>> I can potentially add it along with the timer changes in the dts part2
>> series if you ack the timer patch. We don't have tons of OMAP5 content
>> in the dts branch so it should not conflict.
>>
> Yep. let me know what works. if needed I can put these two patches
> on a branch and send a pull request.

It does not apply to the current devel-dt, what base did you used?

Regards,
Benoit


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Santosh Shilimkar Sept. 13, 2012, 10 a.m. UTC | #4

On Thu, Sep 13, 2012 at 2:57 PM, Benoit Cousson <[e-mail]> wrote:
> On 09/13/2012 11:00 AM, Shilimkar, Santosh wrote:
>> On Thu, Sep 13, 2012 at 2:26 PM, Benoit Cousson <[e-mail]> wrote:
>>> Hi Santosh,
>>>
>>> On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
>>>> Benoit,
>>>>
>>>> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
>>>> <[e-mail]> wrote:
>>>>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>>>>>
>>>>
>>>> [...]
>>>>
>>>>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>>>>
>>>>>>> It is per CPU just like A9 TWD
>>>>>>
>>>>>> Shouldn't we have two nodes then?
>>>>>>
>>>>> I need to check this but arch timer DT node should be same
>>>>> as the twd DT node. May be one node with reference to
>>>>> each CPU node should do but am not too sure about the DT
>>>>> nodes and how all that work.
>>>>>
>>>> Here is an updated patch based on our discussion. Thanks for comments.
>>>> Let me know if you are ok with this version.
>>>
>>> Cool, thanks for the update.
>>>
>>>> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
>>>> From: Santosh Shilimkar <[e-mail]>
>>>> Date: Mon, 13 Aug 2012 14:39:03 +0530
>>>> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
>>>>
>>>> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>>>> The CPU local timers run on the free running real time counter clock.
>>>>
>>>> Signed-off-by: Santosh Shilimkar <[e-mail]>
>>>
>>> Acked-by: Benoit Cousson <[e-mail]>
>>>
>> Thanks Benoit.
>>
>>> Tony,
>>>
>>> I can potentially add it along with the timer changes in the dts part2
>>> series if you ack the timer patch. We don't have tons of OMAP5 content
>>> in the dts branch so it should not conflict.
>>>
>> Yep. let me know what works. if needed I can put these two patches
>> on a branch and send a pull request.
>
> It does not apply to the current devel-dt, what base did you used?
>
Mainline 3.6-rc3. Just refreshed the patches against devel-dt.
The Kconfig file had a minor conflict.  Updated patches
are updated.

Regards
Santosh

Santosh Shilimkar Sept. 13, 2012, 10:05 a.m. UTC | #5

On Thu, Sep 13, 2012 at 3:30 PM, Shilimkar, Santosh
<[e-mail]> wrote:
> On Thu, Sep 13, 2012 at 2:57 PM, Benoit Cousson <[e-mail]> wrote:
>> On 09/13/2012 11:00 AM, Shilimkar, Santosh wrote:
>>> On Thu, Sep 13, 2012 at 2:26 PM, Benoit Cousson <[e-mail]> wrote:
>>>> Hi Santosh,
>>>>
>>>> On 09/11/2012 11:29 AM, Shilimkar, Santosh wrote:
>>>>> Benoit,
>>>>>
>>>>> On Mon, Sep 10, 2012 at 7:09 PM, Shilimkar, Santosh
>>>>> <[e-mail]> wrote:
>>>>>> On Mon, Sep 10, 2012 at 6:44 PM, Benoit Cousson <[e-mail]> wrote:
>>>>>>>
>>>>>
>>>>> [...]
>>>>>
>>>>>>>>> Silly question: Don't we have one arch-timer per CPU?
>>>>>>>>>
>>>>>>>> It is per CPU just like A9 TWD
>>>>>>>
>>>>>>> Shouldn't we have two nodes then?
>>>>>>>
>>>>>> I need to check this but arch timer DT node should be same
>>>>>> as the twd DT node. May be one node with reference to
>>>>>> each CPU node should do but am not too sure about the DT
>>>>>> nodes and how all that work.
>>>>>>
>>>>> Here is an updated patch based on our discussion. Thanks for comments.
>>>>> Let me know if you are ok with this version.
>>>>
>>>> Cool, thanks for the update.
>>>>
>>>>> From 98f6a3b4b52ef7c76ed8b19bf9257c51ee5d7323 Mon Sep 17 00:00:00 2001
>>>>> From: Santosh Shilimkar <[e-mail]>
>>>>> Date: Mon, 13 Aug 2012 14:39:03 +0530
>>>>> Subject: [PATCH] ARM: OMAP5: Enable arch timer support
>>>>>
>>>>> Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>>>>> The CPU local timers run on the free running real time counter clock.
>>>>>
>>>>> Signed-off-by: Santosh Shilimkar <[e-mail]>
>>>>
>>>> Acked-by: Benoit Cousson <[e-mail]>
>>>>
>>> Thanks Benoit.
>>>
>>>> Tony,
>>>>
>>>> I can potentially add it along with the timer changes in the dts part2
>>>> series if you ack the timer patch. We don't have tons of OMAP5 content
>>>> in the dts branch so it should not conflict.
>>>>
>>> Yep. let me know what works. if needed I can put these two patches
>>> on a branch and send a pull request.
>>
>> It does not apply to the current devel-dt, what base did you used?
>>
> Mainline 3.6-rc3. Just refreshed the patches against devel-dt.
> The Kconfig file had a minor conflict.  Updated patches.
Let me know if they apply ok for you ?
Regards
Santosh
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Tony Lindgren Sept. 17, 2012, 9:38 p.m. UTC | #6

* Benoit Cousson <[e-mail]> [120913 01:57]:
> > 
> > Enable Cortex A15 generic timer support for OMAP5 based SOCs.
> > The CPU local timers run on the free running real time counter clock.
> > 
> > Signed-off-by: Santosh Shilimkar <[e-mail]>
> 
> Acked-by: Benoit Cousson <[e-mail]>
> 
> Tony,
> 
> I can potentially add it along with the timer changes in the dts part2
> series if you ack the timer patch. We don't have tons of OMAP5 content
> in the dts branch so it should not conflict.

Yes makes sense to me.

Regards,

Tony
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Tony Lindgren Sept. 17, 2012, 9:39 p.m. UTC | #7

* Tony Lindgren <[e-mail]> [120917 14:39]:
> * Benoit Cousson <[e-mail]> [120913 01:57]:
> > > 
> > > Enable Cortex A15 generic timer support for OMAP5 based SOCs.
> > > The CPU local timers run on the free running real time counter clock.
> > > 
> > > Signed-off-by: Santosh Shilimkar <[e-mail]>
> > 
> > Acked-by: Benoit Cousson <[e-mail]>
> > 
> > Tony,
> > 
> > I can potentially add it along with the timer changes in the dts part2
> > series if you ack the timer patch. We don't have tons of OMAP5 content
> > in the dts branch so it should not conflict.
> 
> Yes makes sense to me.

These may cause bad merge conflicts with Jon's timer patches though?

Tony
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Santosh Shilimkar Sept. 18, 2012, 6:06 a.m. UTC | #8

On Tue, Sep 18, 2012 at 3:09 AM, Tony Lindgren <[e-mail]> wrote:
>
> * Tony Lindgren <[e-mail]> [120917 14:39]:
> > * Benoit Cousson <[e-mail]> [120913 01:57]:
> > > >
> > > > Enable Cortex A15 generic timer support for OMAP5 based SOCs.
> > > > The CPU local timers run on the free running real time counter
> > > > clock.
> > > >
> > > > Signed-off-by: Santosh Shilimkar <[e-mail]>
> > >
> > > Acked-by: Benoit Cousson <[e-mail]>
> > >
> > > Tony,
> > >
> > > I can potentially add it along with the timer changes in the dts part2
> > > series if you ack the timer patch. We don't have tons of OMAP5 content
> > > in the dts branch so it should not conflict.
> >
> > Yes makes sense to me.
>
> These may cause bad merge conflicts with Jon's timer patches though?
>
These patches can be applied against any branch so not necessary to
only apply against the DT tree.

Have you merged Jon's series ? I can refresh the patches
against that branch. Another option is I can split the patch
so that DT change and timer change is seperated.

Let me know what is your preference.

Regards
Santosh
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Tony Lindgren Sept. 18, 2012, 5:53 p.m. UTC | #9

* Shilimkar, Santosh <[e-mail]> [120917 23:07]:
> On Tue, Sep 18, 2012 at 3:09 AM, Tony Lindgren <[e-mail]> wrote:
> >
> > * Tony Lindgren <[e-mail]> [120917 14:39]:
> > > * Benoit Cousson <[e-mail]> [120913 01:57]:
> > > > >
> > > > > Enable Cortex A15 generic timer support for OMAP5 based SOCs.
> > > > > The CPU local timers run on the free running real time counter
> > > > > clock.
> > > > >
> > > > > Signed-off-by: Santosh Shilimkar <[e-mail]>
> > > >
> > > > Acked-by: Benoit Cousson <[e-mail]>
> > > >
> > > > Tony,
> > > >
> > > > I can potentially add it along with the timer changes in the dts part2
> > > > series if you ack the timer patch. We don't have tons of OMAP5 content
> > > > in the dts branch so it should not conflict.
> > >
> > > Yes makes sense to me.
> >
> > These may cause bad merge conflicts with Jon's timer patches though?
> >
> These patches can be applied against any branch so not necessary to
> only apply against the DT tree.
> 
> Have you merged Jon's series ? I can refresh the patches
> against that branch. Another option is I can split the patch
> so that DT change and timer change is seperated.
> 
> Let me know what is your preference.

Maybe do a pull request for the arch timer and dtimer DT changes?

It seems that Jon is still working on the fixes series, so let's
assume that will need to wait a bit.

Regards,

Tony
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Santosh Shilimkar Sept. 19, 2012, 7:57 a.m. UTC | #10

On Tue, Sep 18, 2012 at 11:23 PM, Tony Lindgren <[e-mail]> wrote:
> * Shilimkar, Santosh <[e-mail]> [120917 23:07]:
>> On Tue, Sep 18, 2012 at 3:09 AM, Tony Lindgren <[e-mail]> wrote:
>> >
>> > * Tony Lindgren <[e-mail]> [120917 14:39]:
>> > > * Benoit Cousson <[e-mail]> [120913 01:57]:
>> > > > >
>> > > > > Enable Cortex A15 generic timer support for OMAP5 based SOCs.
>> > > > > The CPU local timers run on the free running real time counter
>> > > > > clock.
>> > > > >
>> > > > > Signed-off-by: Santosh Shilimkar <[e-mail]>
>> > > >
>> > > > Acked-by: Benoit Cousson <[e-mail]>
>> > > >
>> > > > Tony,
>> > > >
>> > > > I can potentially add it along with the timer changes in the dts part2
>> > > > series if you ack the timer patch. We don't have tons of OMAP5 content
>> > > > in the dts branch so it should not conflict.
>> > >
>> > > Yes makes sense to me.
>> >
>> > These may cause bad merge conflicts with Jon's timer patches though?
>> >
>> These patches can be applied against any branch so not necessary to
>> only apply against the DT tree.
>>
>> Have you merged Jon's series ? I can refresh the patches
>> against that branch. Another option is I can split the patch
>> so that DT change and timer change is seperated.
>>
>> Let me know what is your preference.
>
> Maybe do a pull request for the arch timer and dtimer DT changes?
>
Just sent.

> It seems that Jon is still working on the fixes series, so let's
> assume that will need to wait a bit.
>
Ok. Thanks for clarification.

Regards
Santosh
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Patch

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 57e5270..7b986ed 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -33,9 +33,21 @@ 
 	cpus {
 		cpu@0 {
 			compatible = "arm,cortex-a15";
+			timer {
+				compatible = "arm,armv7-timer";
+				/* 14th PPI IRQ, active low level-sensitive */
+				interrupts = <1 14 0x308>;
+				clock-frequency = <6144000>;
+			};
 		};
 		cpu@1 {
 			compatible = "arm,cortex-a15";
+			timer {
+				compatible = "arm,armv7-timer";
+				/* 14th PPI IRQ, active low level-sensitive */
+				interrupts = <1 14 0x308>;
+				clock-frequency = <6144000>;
+			};
 		};
 	};

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 2120f90..53fb77c 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -73,6 +73,7 @@  config SOC_OMAP5
 	select ARM_GIC
 	select HAVE_SMP
 	select SOC_HAS_REALTIME_COUNTER
+	select ARM_ARCH_TIMER

 comment "OMAP Core Type"
 	depends on ARCH_OMAP2
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 8f5b88b..46982d0 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,6 +41,7 @@ 
 #include <plat/dmtimer.h>
 #include <asm/smp_twd.h>
 #include <asm/sched_clock.h>
+#include <asm/arch_timer.h>
 #include "common.h"
 #include <plat/omap_hwmod.h>
 #include <plat/omap_device.h>
@@ -481,9 +482,15 @@  OMAP_SYS_TIMER(4)
 #ifdef CONFIG_SOC_OMAP5
 static void __init omap5_timer_init(void)
 {
+	int err;
+
 	omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
 	omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
 	realtime_counter_init();
+
+	err = arch_timer_of_register();
+	if (err)
+		pr_err("%s: arch_timer_register failed %d\n", __func__, err);
 }
 OMAP_SYS_TIMER(5)
 #endif