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[1/5] drm/i915: don't recheck for invalid pipe bpp

Message ID 1348176967-4323-2-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Sept. 20, 2012, 9:36 p.m. UTC 
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

As noticed by Daniel Vetter, intel_pipe_choose_bpp_dither should
already check for invalid bpp values and set a valid value, so remove
the recheck inside ironlake_crtc_mode_set and also replace a "default"
switch case inside ironlake_set_pipeconf with a BUG().

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   15 +++------------
 1 file changed, 3 insertions(+), 12 deletions(-)

Comments

Rodrigo Vivi Sept. 24, 2012, 10:47 p.m. UTC | #1 
Feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>

On Thu, Sep 20, 2012 at 6:36 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> As noticed by Daniel Vetter, intel_pipe_choose_bpp_dither should
> already check for invalid bpp values and set a valid value, so remove
> the recheck inside ironlake_crtc_mode_set and also replace a "default"
> switch case inside ironlake_set_pipeconf with a BUG().
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   15 +++------------
>  1 file changed, 3 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 947c97d..eb8248b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4624,8 +4624,8 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
>                 val |= PIPE_12BPC;
>                 break;
>         default:
> -               val |= PIPE_8BPC;
> -               break;
> +               /* Case prevented by intel_choose_pipe_bpp_dither. */
> +               BUG();
>         }
>
>         val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
> @@ -4726,7 +4726,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>         struct fdi_m_n m_n = {0};
>         u32 temp;
>         int target_clock, pixel_multiplier, lane, link_bw, factor;
> -       unsigned int pipe_bpp;
>         bool dither;
>         bool is_cpu_edp = false, is_pch_edp = false;
>
> @@ -4800,18 +4799,10 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
>                 target_clock = adjusted_mode->clock;
>
>         /* determine panel color depth */
> -       dither = intel_choose_pipe_bpp_dither(crtc, fb, &pipe_bpp, mode);
> +       dither = intel_choose_pipe_bpp_dither(crtc, fb, &intel_crtc->bpp, mode);
>         if (is_lvds && dev_priv->lvds_dither)
>                 dither = true;
>
> -       if (pipe_bpp != 18 && pipe_bpp != 24 && pipe_bpp != 30 &&
> -           pipe_bpp != 36) {
> -               WARN(1, "intel_choose_pipe_bpp returned invalid value %d\n",
> -                    pipe_bpp);
> -               pipe_bpp = 24;
> -       }
> -       intel_crtc->bpp = pipe_bpp;
> -
>         if (!lane) {
>                 /*
>                  * Account for spread spectrum to avoid
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 947c97d..eb8248b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4624,8 +4624,8 @@  static void ironlake_set_pipeconf(struct drm_crtc *crtc,
 		val |= PIPE_12BPC;
 		break;
 	default:
-		val |= PIPE_8BPC;
-		break;
+		/* Case prevented by intel_choose_pipe_bpp_dither. */
+		BUG();
 	}
 
 	val &= ~(PIPECONF_DITHER_EN | PIPECONF_DITHER_TYPE_MASK);
@@ -4726,7 +4726,6 @@  static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 	struct fdi_m_n m_n = {0};
 	u32 temp;
 	int target_clock, pixel_multiplier, lane, link_bw, factor;
-	unsigned int pipe_bpp;
 	bool dither;
 	bool is_cpu_edp = false, is_pch_edp = false;
 
@@ -4800,18 +4799,10 @@  static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 		target_clock = adjusted_mode->clock;
 
 	/* determine panel color depth */
-	dither = intel_choose_pipe_bpp_dither(crtc, fb, &pipe_bpp, mode);
+	dither = intel_choose_pipe_bpp_dither(crtc, fb, &intel_crtc->bpp, mode);
 	if (is_lvds && dev_priv->lvds_dither)
 		dither = true;
 
-	if (pipe_bpp != 18 && pipe_bpp != 24 && pipe_bpp != 30 &&
-	    pipe_bpp != 36) {
-		WARN(1, "intel_choose_pipe_bpp returned invalid value %d\n",
-		     pipe_bpp);
-		pipe_bpp = 24;
-	}
-	intel_crtc->bpp = pipe_bpp;
-
 	if (!lane) {
 		/*
 		 * Account for spread spectrum to avoid