diff mbox

[2/5] ARM: tegra: dts: add slink controller dt entry

Message ID 1350557795-31487-3-git-send-email-ldewangan@nvidia.com (mailing list archive)
State New, archived
Headers show

Commit Message

Laxman Dewangan Oct. 18, 2012, 10:56 a.m. UTC
Add slink controller details in the dts file of
Tegra20 and Tegra30.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
---
 arch/arm/boot/dts/tegra20.dtsi |   40 ++++++++++++++++++++++++++
 arch/arm/boot/dts/tegra30.dtsi |   60 ++++++++++++++++++++++++++++++++++++++++
 2 files changed, 100 insertions(+), 0 deletions(-)

Comments

Stephen Warren Oct. 18, 2012, 10:41 p.m. UTC | #1
On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
> Add slink controller details in the dts file of
> Tegra20 and Tegra30.

> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi

> +	slink@7000d400 {
> +		compatible = "nvidia,tegra20-slink";
> +		reg = <0x7000d400 0x200>;
> +		interrupts = <0 59 0x04>;
> +		nvidia,dma-req-sel = <15>;

I thought the common DT DMA bindings were going to be in 3.7, and hence
we could just use them here rather than inventing another custom
property for this purpose?
Laxman Dewangan Oct. 19, 2012, 9:10 a.m. UTC | #2
On Friday 19 October 2012 04:11 AM, Stephen Warren wrote:
> On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
>> Add slink controller details in the dts file of
>> Tegra20 and Tegra30.
>> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
>> +	slink@7000d400 {
>> +		compatible = "nvidia,tegra20-slink";
>> +		reg =<0x7000d400 0x200>;
>> +		interrupts =<0 59 0x04>;
>> +		nvidia,dma-req-sel =<15>;
> I thought the common DT DMA bindings were going to be in 3.7, and hence
> we could just use them here rather than inventing another custom
> property for this purpose?
Adding Vinod here.

I looked the dma devicetree bingind document and did not found the 
generic binding name. Howvere, for arm-pl330.txt, it is explained as
Example:

         pdma0: pdma@12680000 {
                 compatible = "arm,pl330", "arm,primecell";
                 reg = <0x12680000 0x1000>;
                 interrupts = <99>;
         };

Client drivers (device nodes requiring dma transfers from dev-to-mem or
mem-to-dev) should specify the DMA channel numbers using a two-value pair
as shown below.

   [property name]  = <[phandle of the dma controller] [dma request id]>;

       where 'dma request id' is the dma request number which is connected
       to the client controller. The 'property name' is recommended to be
       of the form <name>-dma-channel.

   Example:  tx-dma-channel = <&pdma0 12>;


So here I can also add the name like same.

Vinod,
Do you see any issue in follow the above mechanism for Tegra dma client 
driver?

Thanks,
Laxman
Stephen Warren Oct. 19, 2012, 3:56 p.m. UTC | #3
On 10/19/2012 03:10 AM, Laxman Dewangan wrote:
> On Friday 19 October 2012 04:11 AM, Stephen Warren wrote:
>> On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
>>> Add slink controller details in the dts file of
>>> Tegra20 and Tegra30.
>>> diff --git a/arch/arm/boot/dts/tegra20.dtsi
>>> b/arch/arm/boot/dts/tegra20.dtsi
>>> +    slink@7000d400 {
>>> +        compatible = "nvidia,tegra20-slink";
>>> +        reg =<0x7000d400 0x200>;
>>> +        interrupts =<0 59 0x04>;
>>> +        nvidia,dma-req-sel =<15>;
>

(Oh, you need a space before and after the = in all the lines above)

>> I thought the common DT DMA bindings were going to be in 3.7, and hence
>> we could just use them here rather than inventing another custom
>> property for this purpose?
>
> Adding Vinod here.
> 
> I looked the dma devicetree bingind document and did not found the
> generic binding name. Howvere, for arm-pl330.txt, it is explained as ...

That's not the generic bindings. I guess they didn't get merged then. I
guess we can continue with custom bindings until they are.
Vinod Koul Oct. 24, 2012, 3:26 a.m. UTC | #4
On Fri, 2012-10-19 at 09:56 -0600, Stephen Warren wrote:
> On 10/19/2012 03:10 AM, Laxman Dewangan wrote:
> > On Friday 19 October 2012 04:11 AM, Stephen Warren wrote:
> >> On 10/18/2012 04:56 AM, Laxman Dewangan wrote:
> >>> Add slink controller details in the dts file of
> >>> Tegra20 and Tegra30.
> >>> diff --git a/arch/arm/boot/dts/tegra20.dtsi
> >>> b/arch/arm/boot/dts/tegra20.dtsi
> >>> +    slink@7000d400 {
> >>> +        compatible = "nvidia,tegra20-slink";
> >>> +        reg =<0x7000d400 0x200>;
> >>> +        interrupts =<0 59 0x04>;
> >>> +        nvidia,dma-req-sel =<15>;
> >
> 
> (Oh, you need a space before and after the = in all the lines above)
> 
> >> I thought the common DT DMA bindings were going to be in 3.7, and hence
> >> we could just use them here rather than inventing another custom
> >> property for this purpose?
> >
> > Adding Vinod here.
> > 
> > I looked the dma devicetree bingind document and did not found the
> > generic binding name. Howvere, for arm-pl330.txt, it is explained as ...
> 
> That's not the generic bindings. I guess they didn't get merged then. I
> guess we can continue with custom bindings until they are.
Yes they are in topic topic/dmaengine_dt in my tree. Will be merged once
we sort out slave apis.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 6934bca..d12a310 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -186,6 +186,46 @@ 
 		status = "disabled";
 	};
 
+	slink@7000d400 {
+		compatible = "nvidia,tegra20-slink";
+		reg = <0x7000d400 0x200>;
+		interrupts = <0 59 0x04>;
+		nvidia,dma-req-sel = <15>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000d600 {
+		compatible = "nvidia,tegra20-slink";
+		reg = <0x7000d600 0x200>;
+		interrupts = <0 82 0x04>;
+		nvidia,dma-req-sel = <16>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000d800 {
+		compatible = "nvidia,tegra20-slink";
+		reg = <0x7000d480 0x200>;
+		interrupts = <0 83 0x04>;
+		nvidia,dma-req-sel = <17>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000da00 {
+		compatible = "nvidia,tegra20-slink";
+		reg = <0x7000da00 0x200>;
+		interrupts = <0 93 0x04>;
+		nvidia,dma-req-sel = <18>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	pmc {
 		compatible = "nvidia,tegra20-pmc";
 		reg = <0x7000e400 0x400>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 81f5df4..f898911 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -191,6 +191,66 @@ 
 		status = "disabled";
 	};
 
+	slink@7000d400 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000d400 0x200>;
+		interrupts = <0 59 0x04>;
+		nvidia,dma-req-sel = <15>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000d600 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000d600 0x200>;
+		interrupts = <0 82 0x04>;
+		nvidia,dma-req-sel = <16>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000d800 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000d480 0x200>;
+		interrupts = <0 83 0x04>;
+		nvidia,dma-req-sel = <17>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000da00 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000da00 0x200>;
+		interrupts = <0 93 0x04>;
+		nvidia,dma-req-sel = <18>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000dc00 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000dc00 0x200>;
+		interrupts = <0 94 0x04>;
+		nvidia,dma-req-sel = <27>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	slink@7000de00 {
+		compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+		reg = <0x7000de00 0x200>;
+		interrupts = <0 79 0x04>;
+		nvidia,dma-req-sel = <28>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
 	pmc {
 		compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
 		reg = <0x7000e400 0x400>;