Message ID | CANM98q+TQZiXe3GLjcPpPVZz40emmizgnEmyZEju1ruKNR6EEQ@mail.gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Nov 30, 2012 at 04:47:40PM +0000, Christoffer Dall wrote: > On Fri, Nov 30, 2012 at 10:15 AM, Will Deacon <will.deacon@arm.com> wrote: > > At this point, VM1 is running and VM0:VCPU1 is running. VM0:VCPU0 is not > > running because physical CPU0 is handling an interrupt. The problem is that > > when VCPU0 *is* resumed, it will update the VMID of VM0 and could be > > scheduled in parallel with VCPU1 but with a different VMID. > > > > How do you avoid this in the current code? > > > I don't. Nice catch. Please apply your interesting brain to the following fix:) I'm far too sober to look at your patch right now, but I'll think about it over the weekend [I can't break it at a quick glance] :) In the meantime, can you think about whether the TLB operations need to run on every CPU please? Will
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index c4f631e..dbdee30 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -445,6 +445,16 @@ static void update_vttbr(struct kvm *kvm) spin_lock(&kvm_vmid_lock); + /* + * We need to re-check the vmid_gen here to ensure that if another vcpu + * already allocated a valid vmid for this vm, then this vcpu should + * use the same vmid. + */ + if (!need_new_vmid_gen(kvm)) { + spin_unlock(&kvm_vmid_lock); + return; + } + /* First user of a new VMID generation? */ if (unlikely(kvm_next_vmid == 0)) { atomic64_inc(&kvm_vmid_gen);