diff mbox

drm/i915: Fix missed needs_dmar setting

Message ID 1355413667-9343-1-git-send-email-zhenyuw@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Zhenyu Wang Dec. 13, 2012, 3:47 p.m. UTC 
From Ben's AGP dependence removal change, "needs_dmar" flag has not
been properly setup for new chips using new GTT init function. This
one adds missed setting of that flag to make sure we do pci mappings
with IOMMU enabled.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c |    4 ++++
 1 file changed, 4 insertions(+)

Comments

Daniel Vetter Dec. 13, 2012, 11 p.m. UTC | #1 
On Thu, Dec 13, 2012 at 11:47:47PM +0800, Zhenyu Wang wrote:
> From Ben's AGP dependence removal change, "needs_dmar" flag has not
> been properly setup for new chips using new GTT init function. This
> one adds missed setting of that flag to make sure we do pci mappings
> with IOMMU enabled.
> 
> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

Nice catch! Thanks for the patch, merged to -fixes for 3.8.
-Daniel
Ben Widawsky Dec. 14, 2012, 5:40 a.m. UTC | #2 
On Fri, 14 Dec 2012 00:00:07 +0100
Daniel Vetter <daniel@ffwll.ch> wrote:

> On Thu, Dec 13, 2012 at 11:47:47PM +0800, Zhenyu Wang wrote:
> > From Ben's AGP dependence removal change, "needs_dmar" flag has not
> > been properly setup for new chips using new GTT init function. This
> > one adds missed setting of that flag to make sure we do pci mappings
> > with IOMMU enabled.
> > 
> > Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> 
> Nice catch! Thanks for the patch, merged to -fixes for 3.8.
> -Daniel

dmar. can't live with it, can live without it
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cc1be53..9ae588a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -665,6 +665,10 @@  int i915_gem_gtt_init(struct drm_device *dev)
 	if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
 		pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
 
+#ifdef CONFIG_INTEL_IOMMU
+	dev_priv->mm.gtt->needs_dmar = 1;
+#endif
+
 	/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
 	gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
 	dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);