diff mbox

ARM: dts: specify all the per-cpu interrupts of arch timer for exynos5440

Message ID 1358818887-16870-1-git-send-email-kgene.kim@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Kim Kukjin Jan. 22, 2013, 1:41 a.m. UTC
From: Thomas Abraham <thomas.ab@samsung.com>

Need to be changed requirements in the 'cpus' node for exynos5440
to specify all the per-cpu interrupts of arch timer.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
 arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

Comments

Mark Rutland Jan. 22, 2013, 10:15 a.m. UTC | #1
On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
> From: Thomas Abraham <thomas.ab@samsung.com>
> 
> Need to be changed requirements in the 'cpus' node for exynos5440
> to specify all the per-cpu interrupts of arch timer.

The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
Instead, there should be one node (in the root of the tree).

If this works currently it's only because the driver picks up one of the nodes,
and luckily it's the same as the others. This is not guaranteed to work in
future, and will likely break.

> 
> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
>  arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
> index 5406689..c5bd8ed 100644
> --- a/arch/arm/boot/dts/exynos5440.dtsi
> +++ b/arch/arm/boot/dts/exynos5440.dtsi
> @@ -28,7 +28,10 @@
>  			compatible = "arm,cortex-a15";
>  			timer {
>  				compatible = "arm,armv7-timer";
> -				interrupts = <1 13 0xf08>;
> +				interrupts = <1 13 0xf08>,
> +					     <1 14 0xf08>,
> +					     <1 11 0xf08>,
> +					     <1 10 0xf08>;

Also, this interrupts list is updated differently to all the other nodes. Typo?

>  				clock-frequency = <1000000>;
>  			};
>  		};
> @@ -36,7 +39,10 @@
>  			compatible = "arm,cortex-a15";
>  			timer {
>  				compatible = "arm,armv7-timer";
> -				interrupts = <1 14 0xf08>;
> +				interrupts = <1 13 0xf08>;
> +					     <1 14 0xf08>,
> +					     <1 11 0xf08>,
> +					     <1 10 0xf08>;
>  				clock-frequency = <1000000>;
>  			};
>  		};
> @@ -44,7 +50,10 @@
>  			compatible = "arm,cortex-a15";
>  			timer {
>  				compatible = "arm,armv7-timer";
> -				interrupts = <1 14 0xf08>;
> +				interrupts = <1 13 0xf08>;
> +					     <1 14 0xf08>,
> +					     <1 11 0xf08>,
> +					     <1 10 0xf08>;
>  				clock-frequency = <1000000>;
>  			};
>  		};
> @@ -52,7 +61,10 @@
>  			compatible = "arm,cortex-a15";
>  			timer {
>  				compatible = "arm,armv7-timer";
> -				interrupts = <1 14 0xf08>;
> +				interrupts = <1 13 0xf08>;
> +					     <1 14 0xf08>,
> +					     <1 11 0xf08>,
> +					     <1 10 0xf08>;
>  				clock-frequency = <1000000>;
>  			};
>  		};
> -- 
> 1.7.10.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

Please fix this up to only have one timer node, in the root of the tree.

Thanks,
Mark.
Kim Kukjin Jan. 22, 2013, 10:05 p.m. UTC | #2
Mark Rutland wrote:
>
+ devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
 
> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
> > From: Thomas Abraham <thomas.ab@samsung.com>
> >
> > Need to be changed requirements in the 'cpus' node for exynos5440
> > to specify all the per-cpu interrupts of arch timer.
> 
> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
> Instead, there should be one node (in the root of the tree).
> 
Well, I don't think so. As per my understanding, the local timers are
attached to every ARM cores (cpus) and it generates certain interrupt to the
GIC. So the correct representation for this in device tree is to include the
interrupts in the cpu nodes in dts file. Your comments  refer to a
limitation in the Linux kernel implementation of the arch_timer and it
should not result in representing the hardware details incorrectly in the
dts file.

> If this works currently it's only because the driver picks up one of the
nodes,
> and luckily it's the same as the others. This is not guaranteed to work in
> future, and will likely break.
> 
It is up to the Linux kernel implementation of arch_timer to handle the
hardware details in dts file accordingly.

> >
> > Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> >  arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
> >  1 file changed, 16 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/exynos5440.dtsi
> b/arch/arm/boot/dts/exynos5440.dtsi
> > index 5406689..c5bd8ed 100644
> > --- a/arch/arm/boot/dts/exynos5440.dtsi
> > +++ b/arch/arm/boot/dts/exynos5440.dtsi
> > @@ -28,7 +28,10 @@
> >  			compatible = "arm,cortex-a15";
> >  			timer {
> >  				compatible = "arm,armv7-timer";
> > -				interrupts = <1 13 0xf08>;
> > +				interrupts = <1 13 0xf08>,
> > +					     <1 14 0xf08>,
> > +					     <1 11 0xf08>,
> > +					     <1 10 0xf08>;
> 
> Also, this interrupts list is updated differently to all the other nodes.
Typo?
> 
Hmm, I think this should be fine. If any concerns, please let me know in
detail.

[...]

Thanks.

- Kukjin
Mark Rutland Jan. 23, 2013, 10:36 a.m. UTC | #3
On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
> Mark Rutland wrote:
> >
> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>  
> > On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
> > > From: Thomas Abraham <thomas.ab@samsung.com>
> > >
> > > Need to be changed requirements in the 'cpus' node for exynos5440
> > > to specify all the per-cpu interrupts of arch timer.
> > 
> > The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
> > Instead, there should be one node (in the root of the tree).
> > 
> Well, I don't think so. As per my understanding, the local timers are
> attached to every ARM cores (cpus) and it generates certain interrupt to the
> GIC. So the correct representation for this in device tree is to include the
> interrupts in the cpu nodes in dts file. Your comments  refer to a
> limitation in the Linux kernel implementation of the arch_timer and it
> should not result in representing the hardware details incorrectly in the
> dts file.

I disagree. The "correct representation" is whatever the devicetree binding
documentation describes. It does not describe placing timer nodes in the cpu
nodes.

> 
> > If this works currently it's only because the driver picks up one of the
> nodes,
> > and luckily it's the same as the others. This is not guaranteed to work in
> > future, and will likely break.
> > 
> It is up to the Linux kernel implementation of arch_timer to handle the
> hardware details in dts file accordingly.

The binding specification does not specify that there should be multiple timer
nodes, nor does it specify that they should be under cpu nodes. The timers,
being a banked resource, can be described with one node.

It is not up to the Linux kernel to handle undocumented variations of bindings.

> 
> > >
> > > Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
> > > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > > ---
> > >  arch/arm/boot/dts/exynos5440.dtsi |   20 ++++++++++++++++----
> > >  1 file changed, 16 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/exynos5440.dtsi
> > b/arch/arm/boot/dts/exynos5440.dtsi
> > > index 5406689..c5bd8ed 100644
> > > --- a/arch/arm/boot/dts/exynos5440.dtsi
> > > +++ b/arch/arm/boot/dts/exynos5440.dtsi
> > > @@ -28,7 +28,10 @@
> > >  			compatible = "arm,cortex-a15";
> > >  			timer {
> > >  				compatible = "arm,armv7-timer";
> > > -				interrupts = <1 13 0xf08>;
> > > +				interrupts = <1 13 0xf08>,
> > > +					     <1 14 0xf08>,
> > > +					     <1 11 0xf08>,
> > > +					     <1 10 0xf08>;
> > 
> > Also, this interrupts list is updated differently to all the other nodes.
> Typo?
> > 
> Hmm, I think this should be fine. If any concerns, please let me know in
> detail.

Sorry, I misread the diff. Your patch in fact corrects them to be consistent
where they weren't previously.

> 
> [...]
> 
> Thanks.
> 
> - Kukjin
> 
> 

Thanks,
Mark.
Santosh Shilimkar Jan. 23, 2013, 10:55 a.m. UTC | #4
Looping Marc, Benoit

On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>> Mark Rutland wrote:
>>>
>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>
>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>
>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>> to specify all the per-cpu interrupts of arch timer.
>>>
>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>> Instead, there should be one node (in the root of the tree).
>>>
>> Well, I don't think so. As per my understanding, the local timers are
>> attached to every ARM cores (cpus) and it generates certain interrupt to the
>> GIC. So the correct representation for this in device tree is to include the
>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>> limitation in the Linux kernel implementation of the arch_timer and it
>> should not result in representing the hardware details incorrectly in the
>> dts file.
>
> I disagree. The "correct representation" is whatever the devicetree binding
> documentation describes. It does not describe placing timer nodes in the cpu
> nodes.
>
This seems to be exact same topic what is getting discussed here [1]
Technically DT is suppose to represent how the hardware is rather than
how the bindings are done.

But as Marc pointed out, the approach taken currently is to not 
duplicate the banked information. The thread [1] isn't concluded
yet but looks like we might want to avoid duplicating the information
considering, more of such duplication needs to follow. e.g gic i/f

Am still waiting on what Benoit has to say ?

Regards,
Santosh

[1] http://www.spinics.net/lists/linux-omap/msg85110.html
Rob Herring Jan. 23, 2013, 1:55 p.m. UTC | #5
On 01/23/2013 04:36 AM, Mark Rutland wrote:
> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>> Mark Rutland wrote:
>>>
>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>  
>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>
>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>> to specify all the per-cpu interrupts of arch timer.
>>>
>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>> Instead, there should be one node (in the root of the tree).
>>>
>> Well, I don't think so. As per my understanding, the local timers are
>> attached to every ARM cores (cpus) and it generates certain interrupt to the
>> GIC. So the correct representation for this in device tree is to include the
>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>> limitation in the Linux kernel implementation of the arch_timer and it
>> should not result in representing the hardware details incorrectly in the
>> dts file.
> 
> I disagree. The "correct representation" is whatever the devicetree binding
> documentation describes. It does not describe placing timer nodes in the cpu
> nodes.

I don't think we should add other nodes to /cpus besides cpu nodes.

The presence of architected timers is defined by the cpu being a
Cortex-A15. So you don't really need a timer node at all. All that is
really needed is the interrupt. You could add interrupts property
directly to each cpu node. The location of PMU nodes has come up
recently as well, and the PMU interrupt could be added as well.

Whether we should change the binding at this point is questionable.
Normally, we wouldn't want to do that, but as this is all pretty new it
may be okay to make an exception here. However, I don't see anything
that is fundamentally broken with the current binding. Multi-cluster
could introduce some issues.

>>
>>> If this works currently it's only because the driver picks up one of the
>> nodes,
>>> and luckily it's the same as the others. This is not guaranteed to work in
>>> future, and will likely break.
>>>
>> It is up to the Linux kernel implementation of arch_timer to handle the
>> hardware details in dts file accordingly.
> 
> The binding specification does not specify that there should be multiple timer
> nodes, nor does it specify that they should be under cpu nodes. The timers,
> being a banked resource, can be described with one node.
> 
> It is not up to the Linux kernel to handle undocumented variations of bindings.

Except things done before documentation was enforced.

Rob
Benoit Cousson Jan. 24, 2013, 12:42 p.m. UTC | #6
Hi Santosh,

On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
> Looping Marc, Benoit
> 
> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>> Mark Rutland wrote:
>>>>
>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>
>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>
>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>
>>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>>> Instead, there should be one node (in the root of the tree).
>>>>
>>> Well, I don't think so. As per my understanding, the local timers are
>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>> to the
>>> GIC. So the correct representation for this in device tree is to
>>> include the
>>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>>> limitation in the Linux kernel implementation of the arch_timer and it
>>> should not result in representing the hardware details incorrectly in
>>> the
>>> dts file.
>>
>> I disagree. The "correct representation" is whatever the devicetree
>> binding
>> documentation describes. It does not describe placing timer nodes in
>> the cpu
>> nodes.
>>
> This seems to be exact same topic what is getting discussed here [1]
> Technically DT is suppose to represent how the hardware is rather than
> how the bindings are done.
> 
> But as Marc pointed out, the approach taken currently is to not
> duplicate the banked information. The thread [1] isn't concluded
> yet but looks like we might want to avoid duplicating the information
> considering, more of such duplication needs to follow. e.g gic i/f
> 
> Am still waiting on what Benoit has to say ?

I agree with you :-)

I'm not sure the binding was properly done to reflect the HW accurately.

A local timer for my point of view should be located in the cpu node
like a L1 cache. Or at least referenced in each cpu by a phandle.

What was the rational to put it in the root?

Regards,
Benoit
Santosh Shilimkar Jan. 24, 2013, 12:53 p.m. UTC | #7
On Thursday 24 January 2013 06:12 PM, Benoit Cousson wrote:
> Hi Santosh,
>
> On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
>> Looping Marc, Benoit
>>
>> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>>> Mark Rutland wrote:
>>>>>
>>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>>
>>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>>
>>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>>
>>>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>>>> Instead, there should be one node (in the root of the tree).
>>>>>
>>>> Well, I don't think so. As per my understanding, the local timers are
>>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>>> to the
>>>> GIC. So the correct representation for this in device tree is to
>>>> include the
>>>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>>>> limitation in the Linux kernel implementation of the arch_timer and it
>>>> should not result in representing the hardware details incorrectly in
>>>> the
>>>> dts file.
>>>
>>> I disagree. The "correct representation" is whatever the devicetree
>>> binding
>>> documentation describes. It does not describe placing timer nodes in
>>> the cpu
>>> nodes.
>>>
>> This seems to be exact same topic what is getting discussed here [1]
>> Technically DT is suppose to represent how the hardware is rather than
>> how the bindings are done.
>>
>> But as Marc pointed out, the approach taken currently is to not
>> duplicate the banked information. The thread [1] isn't concluded
>> yet but looks like we might want to avoid duplicating the information
>> considering, more of such duplication needs to follow. e.g gic i/f
>>
>> Am still waiting on what Benoit has to say ?
>
> I agree with you :-)
>
> I'm not sure the binding was properly done to reflect the HW accurately.
>
> A local timer for my point of view should be located in the cpu node
> like a L1 cache. Or at least referenced in each cpu by a phandle.
>
> What was the rational to put it in the root?
>
 From Marc's answer it seems to avoid the duplication of data but
I let him elaborate it.

Regards,
Santosh
Marc Zyngier Jan. 24, 2013, 1:16 p.m. UTC | #8
Hi Benoit,

On 24/01/13 12:42, Benoit Cousson wrote:
> Hi Santosh,
> 
> On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
>> Looping Marc, Benoit
>>
>> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>>> Mark Rutland wrote:
>>>>>
>>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>>
>>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>>
>>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>>
>>>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>>>> Instead, there should be one node (in the root of the tree).
>>>>>
>>>> Well, I don't think so. As per my understanding, the local timers are
>>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>>> to the
>>>> GIC. So the correct representation for this in device tree is to
>>>> include the
>>>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>>>> limitation in the Linux kernel implementation of the arch_timer and it
>>>> should not result in representing the hardware details incorrectly in
>>>> the
>>>> dts file.
>>>
>>> I disagree. The "correct representation" is whatever the devicetree
>>> binding
>>> documentation describes. It does not describe placing timer nodes in
>>> the cpu
>>> nodes.
>>>
>> This seems to be exact same topic what is getting discussed here [1]
>> Technically DT is suppose to represent how the hardware is rather than
>> how the bindings are done.
>>
>> But as Marc pointed out, the approach taken currently is to not
>> duplicate the banked information. The thread [1] isn't concluded
>> yet but looks like we might want to avoid duplicating the information
>> considering, more of such duplication needs to follow. e.g gic i/f
>>
>> Am still waiting on what Benoit has to say ?
> 
> I agree with you :-)
> 
> I'm not sure the binding was properly done to reflect the HW accurately.
> 
> A local timer for my point of view should be located in the cpu node
> like a L1 cache. Or at least referenced in each cpu by a phandle.
>
> What was the rational to put it in the root?

The rational was to follow what we already do for most (all?) banked
resources. We already have TWD, GIC and PMU that have a root node,
avoiding duplicated resources. I think consistency is an important thing
to have.

If we decide to move everything into CPU nodes and duplicate all the
banked resources, fine. But that has impacts that reach far beyond the
simple case of the timer.

In particular, good luck with the GIC distributor interface, where the
32 first interrupts are per CPU. This would also mandate a redesign of
the way we specify a PPI, as the CPU mask in the third field doesn't
mean a thing anymore.

If you insist on having a phandle to a timer node, fine by me.

Cheers,

	M.
Santosh Shilimkar Jan. 30, 2013, 7:20 a.m. UTC | #9
Benoit,

On Thursday 24 January 2013 06:46 PM, Marc Zyngier wrote:
> Hi Benoit,
>
> On 24/01/13 12:42, Benoit Cousson wrote:
>> Hi Santosh,
>>
>> On 01/23/2013 11:55 AM, Santosh Shilimkar wrote:
>>> Looping Marc, Benoit
>>>
>>> On Wednesday 23 January 2013 04:06 PM, Mark Rutland wrote:
>>>> On Tue, Jan 22, 2013 at 10:05:18PM +0000, Kukjin Kim wrote:
>>>>> Mark Rutland wrote:
>>>>>>
>>>>> + devicetree-discuss, Grant Likely, Rob Herring and Tony Lindgren
>>>>>
>>>>>> On Tue, Jan 22, 2013 at 01:41:27AM +0000, Kukjin Kim wrote:
>>>>>>> From: Thomas Abraham <thomas.ab@samsung.com>
>>>>>>>
>>>>>>> Need to be changed requirements in the 'cpus' node for exynos5440
>>>>>>> to specify all the per-cpu interrupts of arch timer.
>>>>>>
>>>>>> The node(s) for the arch timer should not be in the cpus/cpu@N nodes.
>>>>>> Instead, there should be one node (in the root of the tree).
>>>>>>
>>>>> Well, I don't think so. As per my understanding, the local timers are
>>>>> attached to every ARM cores (cpus) and it generates certain interrupt
>>>>> to the
>>>>> GIC. So the correct representation for this in device tree is to
>>>>> include the
>>>>> interrupts in the cpu nodes in dts file. Your comments  refer to a
>>>>> limitation in the Linux kernel implementation of the arch_timer and it
>>>>> should not result in representing the hardware details incorrectly in
>>>>> the
>>>>> dts file.
>>>>
>>>> I disagree. The "correct representation" is whatever the devicetree
>>>> binding
>>>> documentation describes. It does not describe placing timer nodes in
>>>> the cpu
>>>> nodes.
>>>>
>>> This seems to be exact same topic what is getting discussed here [1]
>>> Technically DT is suppose to represent how the hardware is rather than
>>> how the bindings are done.
>>>
>>> But as Marc pointed out, the approach taken currently is to not
>>> duplicate the banked information. The thread [1] isn't concluded
>>> yet but looks like we might want to avoid duplicating the information
>>> considering, more of such duplication needs to follow. e.g gic i/f
>>>
>>> Am still waiting on what Benoit has to say ?
>>
>> I agree with you :-)
>>
>> I'm not sure the binding was properly done to reflect the HW accurately.
>>
>> A local timer for my point of view should be located in the cpu node
>> like a L1 cache. Or at least referenced in each cpu by a phandle.
>>
>> What was the rational to put it in the root?
>
> The rational was to follow what we already do for most (all?) banked
> resources. We already have TWD, GIC and PMU that have a root node,
> avoiding duplicated resources. I think consistency is an important thing
> to have.
>
> If we decide to move everything into CPU nodes and duplicate all the
> banked resources, fine. But that has impacts that reach far beyond the
> simple case of the timer.
>
> In particular, good luck with the GIC distributor interface, where the
> 32 first interrupts are per CPU. This would also mandate a redesign of
> the way we specify a PPI, as the CPU mask in the third field doesn't
> mean a thing anymore.
>
> If you insist on having a phandle to a timer node, fine by me.
>
Can you please comment on it so that we can conclude this thread ?
I would like to update my patches and hence the push.

Regards,
Santosh
diff mbox

Patch

diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 5406689..c5bd8ed 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -28,7 +28,10 @@ 
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 13 0xf08>;
+				interrupts = <1 13 0xf08>,
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -36,7 +39,10 @@ 
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -44,7 +50,10 @@ 
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};
@@ -52,7 +61,10 @@ 
 			compatible = "arm,cortex-a15";
 			timer {
 				compatible = "arm,armv7-timer";
-				interrupts = <1 14 0xf08>;
+				interrupts = <1 13 0xf08>;
+					     <1 14 0xf08>,
+					     <1 11 0xf08>,
+					     <1 10 0xf08>;
 				clock-frequency = <1000000>;
 			};
 		};