Message ID | 1359075633-13502-2-git-send-email-dinguyen@altera.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi! > From: Dinh Nguyen <dinguyen@altera.com> > > Up to this point, support for socfpga has only been on a virtual > platform. Now that actual hardware is available, we add the appropriate > device tree source files. Wow, actual hardware :-). Can I get one? > Signed-off-by: Dinh Nguyen <dinguyen@altera.com> > Cc: Russell King <linux@arm.linux.org.uk> > Cc: Arnd Bergmann <arnd@arndb.de> > Cc: Olof Johansson <olof@lixom.net> > Cc: Pavel Machek <pavel@denx.de> I tested it on 3.7-rc2-based tree, as it is newest I have around. It seems to work ok. [Do you have newer git tree somewhere?] Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Pavel Machek <pavel@denx.de> Pavel
Hi Pavel, On Fri, 2013-01-25 at 15:22 +0100, Pavel Machek wrote: > Hi! > > > From: Dinh Nguyen <dinguyen@altera.com> > > > > Up to this point, support for socfpga has only been on a virtual > > platform. Now that actual hardware is available, we add the appropriate > > device tree source files. > > Wow, actual hardware :-). Can I get one? Ramping up production now... > > > Signed-off-by: Dinh Nguyen <dinguyen@altera.com> > > Cc: Russell King <linux@arm.linux.org.uk> > > Cc: Arnd Bergmann <arnd@arndb.de> > > Cc: Olof Johansson <olof@lixom.net> > > Cc: Pavel Machek <pavel@denx.de> > > I tested it on 3.7-rc2-based tree, as it is newest I have around. It > seems to work ok. [Do you have newer git tree somewhere?] > > Tested-by: Pavel Machek <pavel@denx.de> > Reviewed-by: Pavel Machek <pavel@denx.de> Thanks, Dinh > > Pavel >
Hi, Nit below. On Thu, Jan 24, 2013 at 07:00:29PM -0600, dinguyen@altera.com wrote: > diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts > new file mode 100644 > index 0000000..df3551f > --- /dev/null > +++ b/arch/arm/boot/dts/socfpga_vt.dts > @@ -0,0 +1,60 @@ > +/* > + * Copyright (C) 2013 Altera Corporation <www.altera.com> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +/dts-v1/; > +/include/ "socfpga.dtsi" > + > +/ { > + model = "Altera SOCFPGA VT"; > + compatible = "altr,socfpga-vt"; > + [...] > diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c > index 6732924..198f491 100644 > --- a/arch/arm/mach-socfpga/socfpga.c > +++ b/arch/arm/mach-socfpga/socfpga.c > @@ -99,6 +99,7 @@ static void __init socfpga_cyclone5_init(void) > static const char *altera_dt_match[] = { > "altr,socfpga", > "altr,socfpga-cyclone5", > + "altr,socfpga-vt", > NULL > }; If you add "altr,socfpga" as a second compatible field in the dts for the board, then you won't have to update the board C file every time you add a new board dts (as long as you don't need to do something special with that board). -Olof
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 19aec42..936d230 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -25,6 +25,10 @@ ethernet0 = &gmac0; serial0 = &uart0; serial1 = &uart1; + timer0 = &timer0; + timer1 = &timer1; + timer2 = &timer2; + timer3 = &timer3; }; cpus { @@ -98,47 +102,41 @@ interrupts = <1 13 0xf04>; }; - timer0: timer@ffc08000 { + timer0: timer0@ffc08000 { compatible = "snps,dw-apb-timer-sp"; interrupts = <0 167 4>; - clock-frequency = <200000000>; reg = <0xffc08000 0x1000>; }; - timer1: timer@ffc09000 { + timer1: timer1@ffc09000 { compatible = "snps,dw-apb-timer-sp"; interrupts = <0 168 4>; - clock-frequency = <200000000>; reg = <0xffc09000 0x1000>; }; - timer2: timer@ffd00000 { + timer2: timer2@ffd00000 { compatible = "snps,dw-apb-timer-osc"; interrupts = <0 169 4>; - clock-frequency = <200000000>; reg = <0xffd00000 0x1000>; }; - timer3: timer@ffd01000 { + timer3: timer3@ffd01000 { compatible = "snps,dw-apb-timer-osc"; interrupts = <0 170 4>; - clock-frequency = <200000000>; reg = <0xffd01000 0x1000>; }; - uart0: uart@ffc02000 { + uart0: serial0@ffc02000 { compatible = "snps,dw-apb-uart"; reg = <0xffc02000 0x1000>; - clock-frequency = <7372800>; interrupts = <0 162 4>; reg-shift = <2>; reg-io-width = <4>; }; - uart1: uart@ffc03000 { + uart1: serial1@ffc03000 { compatible = "snps,dw-apb-uart"; reg = <0xffc03000 0x1000>; - clock-frequency = <7372800>; interrupts = <0 163 4>; reg-shift = <2>; reg-io-width = <4>; diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts index ab7e4a9..1a6d088 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dts +++ b/arch/arm/boot/dts/socfpga_cyclone5.dts @@ -29,6 +29,32 @@ memory { name = "memory"; device_type = "memory"; - reg = <0x0 0x10000000>; /* 256MB */ + reg = <0x0 0x40000000>; /* 1GB */ + }; + + soc { + timer0@ffc08000 { + clock-frequency = <100000000>; + }; + + timer1@ffc09000 { + clock-frequency = <100000000>; + }; + + timer2@ffd00000 { + clock-frequency = <25000000>; + }; + + timer3@ffd01000 { + clock-frequency = <25000000>; + }; + + serial0@ffc02000 { + clock-frequency = <100000000>; + }; + + serial1@ffc03000 { + clock-frequency = <100000000>; + }; }; }; diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts new file mode 100644 index 0000000..df3551f --- /dev/null +++ b/arch/arm/boot/dts/socfpga_vt.dts @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2013 Altera Corporation <www.altera.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/dts-v1/; +/include/ "socfpga.dtsi" + +/ { + model = "Altera SOCFPGA VT"; + compatible = "altr,socfpga-vt"; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1 GB */ + }; + + soc { + timer0@ffc08000 { + clock-frequency = <7000000>; + }; + + timer1@ffc09000 { + clock-frequency = <7000000>; + }; + + timer2@ffd00000 { + clock-frequency = <7000000>; + }; + + timer3@ffd01000 { + clock-frequency = <7000000>; + }; + + serial0@ffc02000 { + clock-frequency = <7372800>; + }; + + serial1@ffc03000 { + clock-frequency = <7372800>; + }; + }; +}; diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 6732924..198f491 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -99,6 +99,7 @@ static void __init socfpga_cyclone5_init(void) static const char *altera_dt_match[] = { "altr,socfpga", "altr,socfpga-cyclone5", + "altr,socfpga-vt", NULL };