| Message ID | 1365692422-9565-6-git-send-email-plagnioj@jcrosoft.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 04/11/2013 05:00 PM, Jean-Christophe PLAGNIOL-VILLARD : > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > Cc: Nicolas Ferre <nicolas.ferre@atmel.com> > --- > arch/arm/boot/dts/at91sam9263.dtsi | 39 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 39 insertions(+) > > diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi > index 271d4de..3d0effa 100644 > --- a/arch/arm/boot/dts/at91sam9263.dtsi > +++ b/arch/arm/boot/dts/at91sam9263.dtsi > @@ -303,6 +303,34 @@ > }; > }; > > + fb { > + pinctrl_fb: fb-0 { > + atmel,pins = > + <2 1 0x1 0x0 /* PC1 periph A */ > + 2 2 0x1 0x0 /* PC2 periph A */ > + 2 3 0x1 0x0 /* PC3 periph A */ > + 1 9 0x2 0x0 /* PB9 periph B */ > + 2 6 0x1 0x0 /* PC6 periph A */ > + 2 7 0x1 0x0 /* PC7 periph A */ > + 2 8 0x1 0x0 /* PC8 periph A */ > + 2 9 0x1 0x0 /* PC9 periph A */ > + 2 10 0x1 0x0 /* PC10 periph A */ > + 2 11 0x1 0x0 /* PC11 periph A */ > + 2 14 0x1 0x0 /* PC14 periph A */ > + 2 15 0x1 0x0 /* PC15 periph A */ > + 2 16 0x1 0x0 /* PC16 periph A */ > + 2 12 0x2 0x0 /* PC12 periph B */ > + 2 18 0x1 0x0 /* PC18 periph A */ > + 2 19 0x1 0x0 /* PC19 periph A */ > + 2 22 0x1 0x0 /* PC22 periph A */ > + 2 23 0x1 0x0 /* PC23 periph A */ > + 2 24 0x1 0x0 /* PC24 periph A */ > + 2 17 0x2 0x0 /* PC17 periph B */ > + 2 26 0x1 0x0 /* PC26 periph A */ > + 2 27 0x1 0x0>; /* PC27 periph A */ Verified, okay. > + }; > + }; > + > pioA: gpio@fffff200 { > compatible = "atmel,at91rm9200-gpio"; > reg = <0xfffff200 0x200>; > @@ -464,6 +492,17 @@ > }; > }; > > + fb0: fb@0x00500000 { No, it is 0x700000 > + compatible = "atmel,at91sam9263-lcdc"; > + reg = <0x00700000 0x1000>; Ditto. > + interrupts = <26 3 0>; <26 4 0> here. > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_fb>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; Ditto in 9g45 case. > + }; > + > nand0: nand@40000000 { > compatible = "atmel,at91rm9200-nand"; > #address-cells = <1>; >
On 16:11 Tue 16 Apr , Nicolas Ferre wrote: > On 04/11/2013 05:00 PM, Jean-Christophe PLAGNIOL-VILLARD : > > Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > > Cc: Nicolas Ferre <nicolas.ferre@atmel.com> > > --- > > arch/arm/boot/dts/at91sam9263.dtsi | 39 ++++++++++++++++++++++++++++++++++++ > > 1 file changed, 39 insertions(+) > > > > diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi > > index 271d4de..3d0effa 100644 > > --- a/arch/arm/boot/dts/at91sam9263.dtsi > > +++ b/arch/arm/boot/dts/at91sam9263.dtsi > > @@ -303,6 +303,34 @@ > > }; > > }; > > > > + fb { > > + pinctrl_fb: fb-0 { > > + atmel,pins = > > + <2 1 0x1 0x0 /* PC1 periph A */ > > + 2 2 0x1 0x0 /* PC2 periph A */ > > + 2 3 0x1 0x0 /* PC3 periph A */ > > + 1 9 0x2 0x0 /* PB9 periph B */ > > + 2 6 0x1 0x0 /* PC6 periph A */ > > + 2 7 0x1 0x0 /* PC7 periph A */ > > + 2 8 0x1 0x0 /* PC8 periph A */ > > + 2 9 0x1 0x0 /* PC9 periph A */ > > + 2 10 0x1 0x0 /* PC10 periph A */ > > + 2 11 0x1 0x0 /* PC11 periph A */ > > + 2 14 0x1 0x0 /* PC14 periph A */ > > + 2 15 0x1 0x0 /* PC15 periph A */ > > + 2 16 0x1 0x0 /* PC16 periph A */ > > + 2 12 0x2 0x0 /* PC12 periph B */ > > + 2 18 0x1 0x0 /* PC18 periph A */ > > + 2 19 0x1 0x0 /* PC19 periph A */ > > + 2 22 0x1 0x0 /* PC22 periph A */ > > + 2 23 0x1 0x0 /* PC23 periph A */ > > + 2 24 0x1 0x0 /* PC24 periph A */ > > + 2 17 0x2 0x0 /* PC17 periph B */ > > + 2 26 0x1 0x0 /* PC26 periph A */ > > + 2 27 0x1 0x0>; /* PC27 periph A */ > > Verified, okay. > > > + }; > > + }; > > + > > pioA: gpio@fffff200 { > > compatible = "atmel,at91rm9200-gpio"; > > reg = <0xfffff200 0x200>; > > @@ -464,6 +492,17 @@ > > }; > > }; > > > > + fb0: fb@0x00500000 { > > No, it is 0x700000 > > > + compatible = "atmel,at91sam9263-lcdc"; > > + reg = <0x00700000 0x1000>; > > Ditto. > > > + interrupts = <26 3 0>; > > <26 4 0> here. no lcd is 3 even in c and even 3 could be slow in some big lcd case > > > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_fb>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > Ditto in 9g45 case. > > > + }; > > + > > nand0: nand@40000000 { > > compatible = "atmel,at91rm9200-nand"; > > #address-cells = <1>; > > > > > -- > Nicolas Ferre
On 04/16/2013 04:13 PM, Jean-Christophe PLAGNIOL-VILLARD : > On 16:11 Tue 16 Apr , Nicolas Ferre wrote: >> On 04/11/2013 05:00 PM, Jean-Christophe PLAGNIOL-VILLARD : >>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> >>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> >>> --- >>> arch/arm/boot/dts/at91sam9263.dtsi | 39 ++++++++++++++++++++++++++++++++++++ >>> 1 file changed, 39 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi >>> index 271d4de..3d0effa 100644 >>> --- a/arch/arm/boot/dts/at91sam9263.dtsi >>> +++ b/arch/arm/boot/dts/at91sam9263.dtsi >>> @@ -303,6 +303,34 @@ >>> }; >>> }; >>> >>> + fb { >>> + pinctrl_fb: fb-0 { >>> + atmel,pins = >>> + <2 1 0x1 0x0 /* PC1 periph A */ >>> + 2 2 0x1 0x0 /* PC2 periph A */ >>> + 2 3 0x1 0x0 /* PC3 periph A */ >>> + 1 9 0x2 0x0 /* PB9 periph B */ >>> + 2 6 0x1 0x0 /* PC6 periph A */ >>> + 2 7 0x1 0x0 /* PC7 periph A */ >>> + 2 8 0x1 0x0 /* PC8 periph A */ >>> + 2 9 0x1 0x0 /* PC9 periph A */ >>> + 2 10 0x1 0x0 /* PC10 periph A */ >>> + 2 11 0x1 0x0 /* PC11 periph A */ >>> + 2 14 0x1 0x0 /* PC14 periph A */ >>> + 2 15 0x1 0x0 /* PC15 periph A */ >>> + 2 16 0x1 0x0 /* PC16 periph A */ >>> + 2 12 0x2 0x0 /* PC12 periph B */ >>> + 2 18 0x1 0x0 /* PC18 periph A */ >>> + 2 19 0x1 0x0 /* PC19 periph A */ >>> + 2 22 0x1 0x0 /* PC22 periph A */ >>> + 2 23 0x1 0x0 /* PC23 periph A */ >>> + 2 24 0x1 0x0 /* PC24 periph A */ >>> + 2 17 0x2 0x0 /* PC17 periph B */ >>> + 2 26 0x1 0x0 /* PC26 periph A */ >>> + 2 27 0x1 0x0>; /* PC27 periph A */ >> >> Verified, okay. >> >>> + }; >>> + }; >>> + >>> pioA: gpio@fffff200 { >>> compatible = "atmel,at91rm9200-gpio"; >>> reg = <0xfffff200 0x200>; >>> @@ -464,6 +492,17 @@ >>> }; >>> }; >>> >>> + fb0: fb@0x00500000 { >> >> No, it is 0x700000 >> >>> + compatible = "atmel,at91sam9263-lcdc"; >>> + reg = <0x00700000 0x1000>; >> >> Ditto. >> >>> + interrupts = <26 3 0>; >> >> <26 4 0> here. > no lcd is 3 even in c > > and even 3 could be slow in some big lcd case No, you mean the priority, but priority is encoded as the 3rd cell. So, we end up with: <26 4 3> (I agree with the 3) >> >> >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&pinctrl_fb>; >>> + status = "disabled"; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >> >> Ditto in 9g45 case. >> >>> + }; >>> + >>> nand0: nand@40000000 { >>> compatible = "atmel,at91rm9200-nand"; >>> #address-cells = <1>; >>> >> >> >> -- >> Nicolas Ferre > Bye,
On 17:11 Tue 16 Apr , Nicolas Ferre wrote: > On 04/16/2013 04:13 PM, Jean-Christophe PLAGNIOL-VILLARD : > > On 16:11 Tue 16 Apr , Nicolas Ferre wrote: > >> On 04/11/2013 05:00 PM, Jean-Christophe PLAGNIOL-VILLARD : > >>> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > >>> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> > >>> --- > >>> arch/arm/boot/dts/at91sam9263.dtsi | 39 ++++++++++++++++++++++++++++++++++++ > >>> 1 file changed, 39 insertions(+) > >>> > >>> diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi > >>> index 271d4de..3d0effa 100644 > >>> --- a/arch/arm/boot/dts/at91sam9263.dtsi > >>> +++ b/arch/arm/boot/dts/at91sam9263.dtsi > >>> @@ -303,6 +303,34 @@ > >>> }; > >>> }; > >>> > >>> + fb { > >>> + pinctrl_fb: fb-0 { > >>> + atmel,pins = > >>> + <2 1 0x1 0x0 /* PC1 periph A */ > >>> + 2 2 0x1 0x0 /* PC2 periph A */ > >>> + 2 3 0x1 0x0 /* PC3 periph A */ > >>> + 1 9 0x2 0x0 /* PB9 periph B */ > >>> + 2 6 0x1 0x0 /* PC6 periph A */ > >>> + 2 7 0x1 0x0 /* PC7 periph A */ > >>> + 2 8 0x1 0x0 /* PC8 periph A */ > >>> + 2 9 0x1 0x0 /* PC9 periph A */ > >>> + 2 10 0x1 0x0 /* PC10 periph A */ > >>> + 2 11 0x1 0x0 /* PC11 periph A */ > >>> + 2 14 0x1 0x0 /* PC14 periph A */ > >>> + 2 15 0x1 0x0 /* PC15 periph A */ > >>> + 2 16 0x1 0x0 /* PC16 periph A */ > >>> + 2 12 0x2 0x0 /* PC12 periph B */ > >>> + 2 18 0x1 0x0 /* PC18 periph A */ > >>> + 2 19 0x1 0x0 /* PC19 periph A */ > >>> + 2 22 0x1 0x0 /* PC22 periph A */ > >>> + 2 23 0x1 0x0 /* PC23 periph A */ > >>> + 2 24 0x1 0x0 /* PC24 periph A */ > >>> + 2 17 0x2 0x0 /* PC17 periph B */ > >>> + 2 26 0x1 0x0 /* PC26 periph A */ > >>> + 2 27 0x1 0x0>; /* PC27 periph A */ > >> > >> Verified, okay. > >> > >>> + }; > >>> + }; > >>> + > >>> pioA: gpio@fffff200 { > >>> compatible = "atmel,at91rm9200-gpio"; > >>> reg = <0xfffff200 0x200>; > >>> @@ -464,6 +492,17 @@ > >>> }; > >>> }; > >>> > >>> + fb0: fb@0x00500000 { > >> > >> No, it is 0x700000 > >> > >>> + compatible = "atmel,at91sam9263-lcdc"; > >>> + reg = <0x00700000 0x1000>; > >> > >> Ditto. > >> > >>> + interrupts = <26 3 0>; > >> > >> <26 4 0> here. > > no lcd is 3 even in c > > > > and even 3 could be slow in some big lcd case > > No, you mean the priority, but priority is encoded as the 3rd cell. So, > we end up with: > > <26 4 3> > > (I agree with the 3) I hate those magic number so this is the las patch to go in with as soon as the macro for dts are in I free the at91 dts and switch to it > > > >> > >> > >>> + pinctrl-names = "default"; > >>> + pinctrl-0 = <&pinctrl_fb>; > >>> + status = "disabled"; > >>> + #address-cells = <1>; > >>> + #size-cells = <1>; > >> > >> Ditto in 9g45 case. > >> > >>> + }; > >>> + > >>> nand0: nand@40000000 { > >>> compatible = "atmel,at91rm9200-nand"; > >>> #address-cells = <1>; > >>> > >> > >> > >> -- > >> Nicolas Ferre > > > > Bye, > -- > Nicolas Ferre
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi index 271d4de..3d0effa 100644 --- a/arch/arm/boot/dts/at91sam9263.dtsi +++ b/arch/arm/boot/dts/at91sam9263.dtsi @@ -303,6 +303,34 @@ }; }; + fb { + pinctrl_fb: fb-0 { + atmel,pins = + <2 1 0x1 0x0 /* PC1 periph A */ + 2 2 0x1 0x0 /* PC2 periph A */ + 2 3 0x1 0x0 /* PC3 periph A */ + 1 9 0x2 0x0 /* PB9 periph B */ + 2 6 0x1 0x0 /* PC6 periph A */ + 2 7 0x1 0x0 /* PC7 periph A */ + 2 8 0x1 0x0 /* PC8 periph A */ + 2 9 0x1 0x0 /* PC9 periph A */ + 2 10 0x1 0x0 /* PC10 periph A */ + 2 11 0x1 0x0 /* PC11 periph A */ + 2 14 0x1 0x0 /* PC14 periph A */ + 2 15 0x1 0x0 /* PC15 periph A */ + 2 16 0x1 0x0 /* PC16 periph A */ + 2 12 0x2 0x0 /* PC12 periph B */ + 2 18 0x1 0x0 /* PC18 periph A */ + 2 19 0x1 0x0 /* PC19 periph A */ + 2 22 0x1 0x0 /* PC22 periph A */ + 2 23 0x1 0x0 /* PC23 periph A */ + 2 24 0x1 0x0 /* PC24 periph A */ + 2 17 0x2 0x0 /* PC17 periph B */ + 2 26 0x1 0x0 /* PC26 periph A */ + 2 27 0x1 0x0>; /* PC27 periph A */ + }; + }; + pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x200>; @@ -464,6 +492,17 @@ }; }; + fb0: fb@0x00500000 { + compatible = "atmel,at91sam9263-lcdc"; + reg = <0x00700000 0x1000>; + interrupts = <26 3 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fb>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + }; + nand0: nand@40000000 { compatible = "atmel,at91rm9200-nand"; #address-cells = <1>;
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> --- arch/arm/boot/dts/at91sam9263.dtsi | 39 ++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+)