diff mbox

[20/31] mips/kvm: Hook into TLB fault handlers.

Message ID 1370646215-6543-21-git-send-email-ddaney.cavm@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

David Daney June 7, 2013, 11:03 p.m. UTC
From: David Daney <david.daney@cavium.com>

If the CPU is operating in guest mode when a TLB related excpetion
occurs, give KVM a chance to do emulation.

Signed-off-by: David Daney <david.daney@cavium.com>
---
 arch/mips/mm/fault.c       | 8 ++++++++
 arch/mips/mm/tlbex-fault.S | 6 ++++++
 2 files changed, 14 insertions(+)

Comments

Sergei Shtylyov June 7, 2013, 11:34 p.m. UTC | #1
Hello.

On 06/08/2013 03:03 AM, David Daney wrote:

> From: David Daney <david.daney@cavium.com>
>
> If the CPU is operating in guest mode when a TLB related excpetion
> occurs, give KVM a chance to do emulation.
>
> Signed-off-by: David Daney <david.daney@cavium.com>
> ---
>   arch/mips/mm/fault.c       | 8 ++++++++
>   arch/mips/mm/tlbex-fault.S | 6 ++++++
>   2 files changed, 14 insertions(+)
>
> diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
> index 0fead53..9391da49 100644
> --- a/arch/mips/mm/fault.c
> +++ b/arch/mips/mm/fault.c
[...]
> @@ -50,6 +51,13 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
>   	       field, regs->cp0_epc);
>   #endif
>   
> +#ifdef CONFIG_KVM_MIPSVZ
> +	if (test_tsk_thread_flag(current, TIF_GUESTMODE)) {
> +		if (mipsvz_page_fault(regs, write, address))

    Any reason not to collapse these into single *if*?

> +			return;
> +	}
> +#endif
> +
>

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David Daney June 8, 2013, 12:15 a.m. UTC | #2
On 06/07/2013 04:34 PM, Sergei Shtylyov wrote:
> Hello.
>
> On 06/08/2013 03:03 AM, David Daney wrote:
>
>> From: David Daney <david.daney@cavium.com>
>>
>> If the CPU is operating in guest mode when a TLB related excpetion
>> occurs, give KVM a chance to do emulation.
>>
>> Signed-off-by: David Daney <david.daney@cavium.com>
>> ---
>>   arch/mips/mm/fault.c       | 8 ++++++++
>>   arch/mips/mm/tlbex-fault.S | 6 ++++++
>>   2 files changed, 14 insertions(+)
>>
>> diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
>> index 0fead53..9391da49 100644
>> --- a/arch/mips/mm/fault.c
>> +++ b/arch/mips/mm/fault.c
> [...]
>> @@ -50,6 +51,13 @@ asmlinkage void __kprobes do_page_fault(struct
>> pt_regs *regs, unsigned long writ
>>              field, regs->cp0_epc);
>>   #endif
>> +#ifdef CONFIG_KVM_MIPSVZ
>> +    if (test_tsk_thread_flag(current, TIF_GUESTMODE)) {
>> +        if (mipsvz_page_fault(regs, write, address))
>
>     Any reason not to collapse these into single *if*?
>

It makes the conditional call to mipsvz_page_fault() less obvious.

Certainly the same semantics can be achieved several different ways.

David Daney


>> +            return;
>> +    }
>> +#endif
>> +
>>
>
>


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Ralf Baechle June 16, 2013, 8:51 a.m. UTC | #3
Acked-by: Ralf Baechle <ralf@linux-mips.org>

  Ralf
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diff mbox

Patch

diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 0fead53..9391da49 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -26,6 +26,7 @@ 
 #include <asm/ptrace.h>
 #include <asm/highmem.h>		/* For VMALLOC_END */
 #include <linux/kdebug.h>
+#include <asm/kvm_mips_vz.h>
 
 /*
  * This routine handles page faults.  It determines the address,
@@ -50,6 +51,13 @@  asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
 	       field, regs->cp0_epc);
 #endif
 
+#ifdef CONFIG_KVM_MIPSVZ
+	if (test_tsk_thread_flag(current, TIF_GUESTMODE)) {
+		if (mipsvz_page_fault(regs, write, address))
+			return;
+	}
+#endif
+
 #ifdef CONFIG_KPROBES
 	/*
 	 * This is to notify the fault handler of the kprobes.	The
diff --git a/arch/mips/mm/tlbex-fault.S b/arch/mips/mm/tlbex-fault.S
index 318855e..df0f70b 100644
--- a/arch/mips/mm/tlbex-fault.S
+++ b/arch/mips/mm/tlbex-fault.S
@@ -14,6 +14,12 @@ 
 	NESTED(tlb_do_page_fault_\write, PT_SIZE, sp)
 	SAVE_ALL
 	MFC0	a2, CP0_BADVADDR
+#ifdef CONFIG_KVM_MIPSVZ
+	mfc0	v0, CP0_BADINSTR
+	mfc0	v1, CP0_BADINSTRP
+	sw	v0, PT_BADINSTR(sp)
+	sw	v1, PT_BADINSTRP(sp)
+#endif
 	KMODE
 	move	a0, sp
 	REG_S	a2, PT_BVADDR(sp)