| Message ID | 1372844557-3078-5-git-send-email-b32955@freescale.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Jul 03, 2013 at 05:42:36PM +0800, Huang Shijie wrote: > In imx6q-arm2 board, the UART2 works in the dte mode. > So add a pinctrl for it. > > Signed-off-by: Huang Shijie <b32955@freescale.com> > --- > arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ > 1 files changed, 9 insertions(+), 0 deletions(-) Since imx6q and imx6dl are pin-to-pin compatible, from now on I would require the same pin group be added for these two SoC together, so that we can enforce the same label name. > > diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi > index 9a69891..8a518c6 100644 > --- a/arch/arm/boot/dts/imx6q.dtsi > +++ b/arch/arm/boot/dts/imx6q.dtsi > @@ -266,6 +266,15 @@ > MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 > >; > }; > + > + pinctrl_uart2_dte: uart2grp-2 { > + fsl,pins = < > + MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 > + MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 > + MX6Q_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 > + MX6Q_PAD_EIM_D29__UART2_CTS_B 0x1b0b1 Why do you have two pads mux-ed on one function? Shawn > + >; > + }; > }; > > uart4 { > -- > 1.7.1 > >
? 2013?07?04? 15:23, Shawn Guo ??: > On Wed, Jul 03, 2013 at 05:42:36PM +0800, Huang Shijie wrote: >> In imx6q-arm2 board, the UART2 works in the dte mode. >> So add a pinctrl for it. >> >> Signed-off-by: Huang Shijie<b32955@freescale.com> >> --- >> arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ >> 1 files changed, 9 insertions(+), 0 deletions(-) > Since imx6q and imx6dl are pin-to-pin compatible, from now on I would > require the same pin group be added for these two SoC together, so that > we can enforce the same label name. > I knew it. But this pinctrl is only used in imx6q-arm2 board which uses a big armdillo board, so i did not add the same label to imx6dl. Do we have a imx6dl-arm2 board? if we have , i can add it. >> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi >> index 9a69891..8a518c6 100644 >> --- a/arch/arm/boot/dts/imx6q.dtsi >> +++ b/arch/arm/boot/dts/imx6q.dtsi >> @@ -266,6 +266,15 @@ >> MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >> >; >> }; >> + >> + pinctrl_uart2_dte: uart2grp-2 { >> + fsl,pins =< >> + MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 >> + MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 >> + MX6Q_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 >> + MX6Q_PAD_EIM_D29__UART2_CTS_B 0x1b0b1 > Why do you have two pads mux-ed on one function? I think the name of the PAD is wrong. thanks Huang Shijie
On Thu, Jul 04, 2013 at 04:42:39PM +0800, Huang Shijie wrote: > But this pinctrl is only used in imx6q-arm2 board which uses a big > armdillo board, > so i did not add the same label to imx6dl. > > Do we have a imx6dl-arm2 board? if we have , i can add it. It does not matter whether or not the pin group is used on an imx6dl board. We have to add it for both SoCs, because it's the only way to keep use same label for same pin group on two SoCs. > > >>diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi > >>index 9a69891..8a518c6 100644 > >>--- a/arch/arm/boot/dts/imx6q.dtsi > >>+++ b/arch/arm/boot/dts/imx6q.dtsi > >>@@ -266,6 +266,15 @@ > >> MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 > >> >; > >> }; > >>+ > >>+ pinctrl_uart2_dte: uart2grp-2 { Forgot mentioning that in imx dts we generally do not encode function name like "dte" in the label but just number. > >>+ fsl,pins =< > >>+ MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 > >>+ MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 > >>+ MX6Q_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 > >>+ MX6Q_PAD_EIM_D29__UART2_CTS_B 0x1b0b1 > >Why do you have two pads mux-ed on one function? > I think the name of the PAD is wrong. Fix the name first, then. Shawn
? 2013?07?04? 16:56, Shawn Guo ??: > On Thu, Jul 04, 2013 at 04:42:39PM +0800, Huang Shijie wrote: >> But this pinctrl is only used in imx6q-arm2 board which uses a big >> armdillo board, >> so i did not add the same label to imx6dl. >> >> Do we have a imx6dl-arm2 board? if we have , i can add it. > It does not matter whether or not the pin group is used on an imx6dl > board. We have to add it for both SoCs, because it's the only way to > keep use same label for same pin group on two SoCs. > >>>> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi >>>> index 9a69891..8a518c6 100644 >>>> --- a/arch/arm/boot/dts/imx6q.dtsi >>>> +++ b/arch/arm/boot/dts/imx6q.dtsi >>>> @@ -266,6 +266,15 @@ >>>> MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >>>> >; >>>> }; >>>> + >>>> + pinctrl_uart2_dte: uart2grp-2 { > Forgot mentioning that in imx dts we generally do not encode function > name like "dte" in the label but just number. > >>>> + fsl,pins =< >>>> + MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 >>>> + MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 >>>> + MX6Q_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 >>>> + MX6Q_PAD_EIM_D29__UART2_CTS_B 0x1b0b1 >>> Why do you have two pads mux-ed on one function? >> I think the name of the PAD is wrong. > Fix the name first, then. ok. i will fix them in the next version. thanks Huang Shijie
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 9a69891..8a518c6 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -266,6 +266,15 @@ MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >; }; + + pinctrl_uart2_dte: uart2grp-2 { + fsl,pins = < + MX6Q_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 + MX6Q_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 + MX6Q_PAD_EIM_D28__UART2_CTS_B 0x1b0b1 + MX6Q_PAD_EIM_D29__UART2_CTS_B 0x1b0b1 + >; + }; }; uart4 {
In imx6q-arm2 board, the UART2 works in the dte mode. So add a pinctrl for it. Signed-off-by: Huang Shijie <b32955@freescale.com> --- arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)