diff mbox

[Qemu-devel,qom-cpu,for-next,1/2] cpu: Use QTAILQ for CPU list

Message ID 5214CABD.8010509@suse.de (mailing list archive)
State New, archived
Headers show

Commit Message

Andreas Färber Aug. 21, 2013, 2:12 p.m. UTC
Am 30.07.2013 18:55, schrieb Andreas Färber:
> Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand
> macros.
> 
> Signed-off-by: Andreas Färber <afaerber@suse.de>

Needs the following addition now:

          */
@@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
         /* virtual timer */
         qdev_connect_gpio_out(cpudev, 1,
                               qdev_get_gpio_in(s->gic, ppibase + 27));
+        i++;
     }

     /* Memory map (addresses are offsets from PERIPHBASE):

Comments

Peter Maydell Aug. 21, 2013, 2:36 p.m. UTC | #1
On 21 August 2013 15:12, Andreas Färber <afaerber@suse.de> wrote:

> -    for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
> cpu->next_cpu) {
> +    i = 0;
> +    CPU_FOREACH(cpu) {
>          DeviceState *cpudev = DEVICE(cpu);
>          int ppibase = s->num_irq - 32 + i * 32;
> +
> +        if (i < s->num_cpu) {
> +            break;
> +        }
> +
>          /* physical timer; we wire it up to the non-secure timer's ID,
>           * since a real A15 always has TrustZone but QEMU doesn't.
>           */
> @@ -83,6 +89,7 @@ static int a15mp_priv_init(SysBusDevice *dev)
>          /* virtual timer */
>          qdev_connect_gpio_out(cpudev, 1,
>                                qdev_get_gpio_in(s->gic, ppibase + 27));
> +        i++;
>      }

It seems a bit ugly to have to both enumerate the CPUs
via CPU_FOREACH and update an index i simultaneously.
Isn't there any way to either say "give me the CPU pointer for
CPU i" or "give me the index i of this CPU" ?

(there are a few bits post-arm_pic-removal that could be
a little cleaner with one or the other of the above.)

thanks
-- PMM
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diff mbox

Patch

diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index af182da..9d0e27e 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -72,9 +72,15 @@  static int a15mp_priv_init(SysBusDevice *dev)
     /* Wire the outputs from each CPU's generic timer to the
      * appropriate GIC PPI inputs
      */
-    for (i = 0, cpu = first_cpu; i < s->num_cpu; i++, cpu =
cpu->next_cpu) {
+    i = 0;
+    CPU_FOREACH(cpu) {
         DeviceState *cpudev = DEVICE(cpu);
         int ppibase = s->num_irq - 32 + i * 32;
+
+        if (i < s->num_cpu) {
+            break;
+        }
+
         /* physical timer; we wire it up to the non-secure timer's ID,
          * since a real A15 always has TrustZone but QEMU doesn't.