| Message ID | 1377070105-15902-1-git-send-email-shc_work@mail.ru (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, Aug 21, 2013 at 11:28:23AM +0400, Alexander Shiyan wrote: > RTS/CTS pins can be used for different purposes, so create separate > definitions for these pins. > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru> This series looks good to me. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Sascha > --- > arch/arm/boot/dts/imx51-babbage.dts | 4 ++-- > arch/arm/boot/dts/imx51.dtsi | 10 ++++++++++ > 2 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts > index 1d337d9..f13f339 100644 > --- a/arch/arm/boot/dts/imx51-babbage.dts > +++ b/arch/arm/boot/dts/imx51-babbage.dts > @@ -95,7 +95,7 @@ > > &uart3 { > pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_uart3_1>; > + pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>; > fsl,uart-has-rtscts; > status = "okay"; > }; > @@ -252,7 +252,7 @@ > > &uart1 { > pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_uart1_1>; > + pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>; > fsl,uart-has-rtscts; > status = "okay"; > }; > diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi > index a85abb4..b7cda0a 100644 > --- a/arch/arm/boot/dts/imx51.dtsi > +++ b/arch/arm/boot/dts/imx51.dtsi > @@ -747,6 +747,11 @@ > fsl,pins = < > MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 > MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 > + >; > + }; > + > + pinctrl_uart1_rtscts_1: uart1rtscts-1 { > + fsl,pins = < > MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 > MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 > >; > @@ -767,6 +772,11 @@ > fsl,pins = < > MX51_PAD_EIM_D25__UART3_RXD 0x1c5 > MX51_PAD_EIM_D26__UART3_TXD 0x1c5 > + >; > + }; > + > + pinctrl_uart3_rtscts_1: uart3rtscts-1 { > + fsl,pins = < > MX51_PAD_EIM_D27__UART3_RTS 0x1c5 > MX51_PAD_EIM_D24__UART3_CTS 0x1c5 > >; > -- > 1.8.1.5 > >
On Wed, Aug 21, 2013 at 11:28:23AM +0400, Alexander Shiyan wrote: > RTS/CTS pins can be used for different purposes, so create separate > definitions for these pins. > > Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Applied all 3, thanks. Shawn
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index 1d337d9..f13f339 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -95,7 +95,7 @@ &uart3 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3_1>; + pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>; fsl,uart-has-rtscts; status = "okay"; }; @@ -252,7 +252,7 @@ &uart1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_1>; + pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>; fsl,uart-has-rtscts; status = "okay"; }; diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index a85abb4..b7cda0a 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -747,6 +747,11 @@ fsl,pins = < MX51_PAD_UART1_RXD__UART1_RXD 0x1c5 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5 + >; + }; + + pinctrl_uart1_rtscts_1: uart1rtscts-1 { + fsl,pins = < MX51_PAD_UART1_RTS__UART1_RTS 0x1c5 MX51_PAD_UART1_CTS__UART1_CTS 0x1c5 >; @@ -767,6 +772,11 @@ fsl,pins = < MX51_PAD_EIM_D25__UART3_RXD 0x1c5 MX51_PAD_EIM_D26__UART3_TXD 0x1c5 + >; + }; + + pinctrl_uart3_rtscts_1: uart3rtscts-1 { + fsl,pins = < MX51_PAD_EIM_D27__UART3_RTS 0x1c5 MX51_PAD_EIM_D24__UART3_CTS 0x1c5 >;
RTS/CTS pins can be used for different purposes, so create separate definitions for these pins. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> --- arch/arm/boot/dts/imx51-babbage.dts | 4 ++-- arch/arm/boot/dts/imx51.dtsi | 10 ++++++++++ 2 files changed, 12 insertions(+), 2 deletions(-)