| Message ID | 1381504601-23773-2-git-send-email-svarbanov@mm-sol.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
On 10/11, Stanimir Varbanov wrote: > This adds Qualcomm PRNG driver device tree binding documentation > to use as an example in dts trees. > > Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> > --- > Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > create mode 100644 Documentation/devicetree/bindings/rng/qcom,prng.txt > > diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt > new file mode 100644 > index 000000000000..92be00085ab1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt > @@ -0,0 +1,17 @@ > +Qualcomm MSM pseudo random number generator. > + > +Required properties: > + > +- compatible : should be "qcom,prng" > +- reg : specifies base physical address and size of the registers map > +- clocks : phandle to clock-controller plus clock-specifier pair > +- clock-names : "prng" clocks all registers, FIFO and circuits in PRNG IP block We're trying to keep to more generic names such as "core" for clocks like this. We've had problems in the past where hardware designers named the clock input after the name of the hardware and then the name of the hardware changed in the next version of the chip (although the hardware was mostly compatible with the previous version) and so they renamed the clock input. This leaked into the software drivers and we had horrible things like platform data for clock names. Sticking to "core" indicates what the clock does (i.e. it clocks the core PRNG hardware) while staying generic enough to prevent problems in the future if the block is renamed to something else. It might also help us in the future should our bus layer become smart enough to manage clocks for drivers without their knowing. > + > +Example: > + > + rng { It's good practice to add the unit address here, so rng@f9bff000. > + compatible = "qcom,prng"; > + reg = <0xf9bff000 0x200>; > + clocks = <&clock GCC_PRNG_AHB_CLK>; > + clock-names = "prng"; > + };
Hi Stephen, Thanks for the review. On 10/11/2013 11:46 PM, Stephen Boyd wrote: > On 10/11, Stanimir Varbanov wrote: >> This adds Qualcomm PRNG driver device tree binding documentation >> to use as an example in dts trees. >> >> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> >> --- >> Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/rng/qcom,prng.txt >> >> diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt >> new file mode 100644 >> index 000000000000..92be00085ab1 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt >> @@ -0,0 +1,17 @@ >> +Qualcomm MSM pseudo random number generator. >> + >> +Required properties: >> + >> +- compatible : should be "qcom,prng" >> +- reg : specifies base physical address and size of the registers map >> +- clocks : phandle to clock-controller plus clock-specifier pair >> +- clock-names : "prng" clocks all registers, FIFO and circuits in PRNG IP block > > We're trying to keep to more generic names such as "core" for > clocks like this. We've had problems in the past where hardware > designers named the clock input after the name of the hardware > and then the name of the hardware changed in the next version of > the chip (although the hardware was mostly compatible with the > previous version) and so they renamed the clock input. This > leaked into the software drivers and we had horrible things like > platform data for clock names. Sticking to "core" indicates what > the clock does (i.e. it clocks the core PRNG hardware) while > staying generic enough to prevent problems in the future if the > block is renamed to something else. It might also help us in the > future should our bus layer become smart enough to manage clocks > for drivers without their knowing. Thanks for the detailed explanation, I will rename the clock. > >> + >> +Example: >> + >> + rng { > > It's good practice to add the unit address here, so rng@f9bff000. I will follow the good practice, thanks. > >> + compatible = "qcom,prng"; >> + reg = <0xf9bff000 0x200>; >> + clocks = <&clock GCC_PRNG_AHB_CLK>; >> + clock-names = "prng"; >> + }; > -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/rng/qcom,prng.txt b/Documentation/devicetree/bindings/rng/qcom,prng.txt new file mode 100644 index 000000000000..92be00085ab1 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/qcom,prng.txt @@ -0,0 +1,17 @@ +Qualcomm MSM pseudo random number generator. + +Required properties: + +- compatible : should be "qcom,prng" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- clock-names : "prng" clocks all registers, FIFO and circuits in PRNG IP block + +Example: + + rng { + compatible = "qcom,prng"; + reg = <0xf9bff000 0x200>; + clocks = <&clock GCC_PRNG_AHB_CLK>; + clock-names = "prng"; + };
This adds Qualcomm PRNG driver device tree binding documentation to use as an example in dts trees. Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com> --- Documentation/devicetree/bindings/rng/qcom,prng.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/qcom,prng.txt