| Message ID | 1383202124-1775-4-git-send-email-tushar.behera@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, 31 Oct 2013, Tushar Behera wrote: > S5M8767 chip has 3 crystal oscillators running at 32KHz. These are > supported by s2mps11-clk driver. > > Signed-off-by: Tushar Behera <tushar.behera@linaro.org> > CC: Lee Jones <lee.jones@linaro.org> > --- > drivers/mfd/sec-core.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c > index 34c18fb..020b86b 100644 > --- a/drivers/mfd/sec-core.c > +++ b/drivers/mfd/sec-core.c > @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { > .name = "s5m8767-pmic", > }, { > .name = "s5m-rtc", > - }, > + }, { > + .name = "s5m8767-clk", > + } > }; > > static struct mfd_cell s2mps11_devs[] = { Acked-by: Lee Jones <lee.jones@linaro.org> I'd prefer to take this patch in via the MFD tree once you have support from the other maintainers for the set.
On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote: > On Thu, 31 Oct 2013, Tushar Behera wrote: > >> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are >> supported by s2mps11-clk driver. >> >> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> >> CC: Lee Jones <lee.jones@linaro.org> >> --- >> drivers/mfd/sec-core.c | 4 +++- >> 1 file changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c >> index 34c18fb..020b86b 100644 >> --- a/drivers/mfd/sec-core.c >> +++ b/drivers/mfd/sec-core.c >> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { >> .name = "s5m8767-pmic", >> }, { >> .name = "s5m-rtc", >> - }, >> + }, { >> + .name = "s5m8767-clk", >> + } >> }; >> >> static struct mfd_cell s2mps11_devs[] = { > > Acked-by: Lee Jones <lee.jones@linaro.org> > Thanks. > I'd prefer to take this patch in via the MFD tree once you have > support from the other maintainers for the set. > Ok. I will let you know once I get the clock patches through.
On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote: > On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote: >> On Thu, 31 Oct 2013, Tushar Behera wrote: >> >>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are >>> supported by s2mps11-clk driver. >>> >>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> >>> CC: Lee Jones <lee.jones@linaro.org> >>> --- >>> drivers/mfd/sec-core.c | 4 +++- >>> 1 file changed, 3 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c >>> index 34c18fb..020b86b 100644 >>> --- a/drivers/mfd/sec-core.c >>> +++ b/drivers/mfd/sec-core.c >>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { >>> .name = "s5m8767-pmic", >>> }, { >>> .name = "s5m-rtc", >>> - }, >>> + }, { >>> + .name = "s5m8767-clk", Do you want to handle these as "clock"? previous time, it's implemented at regulator. please see drivers/regulator/max* series. Thank you, Kyungmin Park >>> + } >>> }; >>> >>> static struct mfd_cell s2mps11_devs[] = { >> >> Acked-by: Lee Jones <lee.jones@linaro.org> >> > > Thanks. > >> I'd prefer to take this patch in via the MFD tree once you have >> support from the other maintainers for the set. >> > > Ok. I will let you know once I get the clock patches through. > > -- > Tushar Behera > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On 5 November 2013 13:27, Kyungmin Park <kmpark@infradead.org> wrote: > On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote: >> On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote: >>> On Thu, 31 Oct 2013, Tushar Behera wrote: >>> >>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are >>>> supported by s2mps11-clk driver. >>>> >>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> >>>> CC: Lee Jones <lee.jones@linaro.org> >>>> --- >>>> drivers/mfd/sec-core.c | 4 +++- >>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c >>>> index 34c18fb..020b86b 100644 >>>> --- a/drivers/mfd/sec-core.c >>>> +++ b/drivers/mfd/sec-core.c >>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { >>>> .name = "s5m8767-pmic", >>>> }, { >>>> .name = "s5m-rtc", >>>> - }, >>>> + }, { >>>> + .name = "s5m8767-clk", > > Do you want to handle these as "clock"? previous time, it's > implemented at regulator. please see drivers/regulator/max* series. > > Thank you, > Kyungmin Park There is already a clock-implementation available for this kind of device (through clk-s2mps11). I would like to extend that support. Also for MAX77686, it is implemented through clock subsystem.
On Tue, Nov 5, 2013 at 5:04 PM, Tushar Behera <tushar.behera@linaro.org> wrote: > On 5 November 2013 13:27, Kyungmin Park <kmpark@infradead.org> wrote: >> On Tue, Nov 5, 2013 at 3:29 PM, Tushar Behera <tushar.behera@linaro.org> wrote: >>> On 31 October 2013 21:46, Lee Jones <lee.jones@linaro.org> wrote: >>>> On Thu, 31 Oct 2013, Tushar Behera wrote: >>>> >>>>> S5M8767 chip has 3 crystal oscillators running at 32KHz. These are >>>>> supported by s2mps11-clk driver. >>>>> >>>>> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> >>>>> CC: Lee Jones <lee.jones@linaro.org> >>>>> --- >>>>> drivers/mfd/sec-core.c | 4 +++- >>>>> 1 file changed, 3 insertions(+), 1 deletion(-) >>>>> >>>>> diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c >>>>> index 34c18fb..020b86b 100644 >>>>> --- a/drivers/mfd/sec-core.c >>>>> +++ b/drivers/mfd/sec-core.c >>>>> @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { >>>>> .name = "s5m8767-pmic", >>>>> }, { >>>>> .name = "s5m-rtc", >>>>> - }, >>>>> + }, { >>>>> + .name = "s5m8767-clk", >> >> Do you want to handle these as "clock"? previous time, it's >> implemented at regulator. please see drivers/regulator/max* series. >> >> Thank you, >> Kyungmin Park > > There is already a clock-implementation available for this kind of > device (through clk-s2mps11). I would like to extend that support. > Also for MAX77686, it is implemented through clock subsystem. > Yes it's possible, but losts of MAX chips are implemented already with regulator. but in case of maxim chip. it's voltage instead of clock. doesn't better to use regulaor? Ah I confused between 32KHz and Safeout. okay it's 32KHz clock. okay it's better to use clock. Ignore previous comments. Thank you, Kyungmin Park
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index 34c18fb..020b86b 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -56,7 +56,9 @@ static struct mfd_cell s5m8767_devs[] = { .name = "s5m8767-pmic", }, { .name = "s5m-rtc", - }, + }, { + .name = "s5m8767-clk", + } }; static struct mfd_cell s2mps11_devs[] = {
S5M8767 chip has 3 crystal oscillators running at 32KHz. These are supported by s2mps11-clk driver. Signed-off-by: Tushar Behera <tushar.behera@linaro.org> CC: Lee Jones <lee.jones@linaro.org> --- drivers/mfd/sec-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)