diff mbox

[2/3] ARM: dts: keystone: Add usb devicetree bindings

Message ID 1385410581-12148-3-git-send-email-w-kwok2@ti.com (mailing list archive)
State New, archived
Headers show

Commit Message

WingMan Kwok Nov. 25, 2013, 8:16 p.m. UTC
Added device tree support for TI's Keystone USB driver and updated the
Documentation with device tree binding information.

On Keystone II platforms, we use no-op phy driver.

Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
---
 .../devicetree/bindings/usb/keystone-usb.txt       |   43 ++++++++++++++++++++
 arch/arm/boot/dts/keystone.dtsi                    |   27 ++++++++++++
 2 files changed, 70 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt

Comments

Felipe Balbi Nov. 25, 2013, 8:42 p.m. UTC | #1
Hi,

On Mon, Nov 25, 2013 at 03:16:20PM -0500, WingMan Kwok wrote:
> Added device tree support for TI's Keystone USB driver and updated the
> Documentation with device tree binding information.
> 
> On Keystone II platforms, we use no-op phy driver.
> 
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> ---
>  .../devicetree/bindings/usb/keystone-usb.txt       |   43 ++++++++++++++++++++
>  arch/arm/boot/dts/keystone.dtsi                    |   27 ++++++++++++
>  2 files changed, 70 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
> 
> diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
> new file mode 100644
> index 0000000..a67de8f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
> @@ -0,0 +1,43 @@
> +TI Keystone Soc USB Controller
> +
> +DWC3 GLUE
> +
> +Required properties:
> + - compatible: should be "ti,keystone-dwc3".
> + - #address-cells, #size-cells : should be '1' if the device has sub-nodes
> +   with 'reg' property.
> + - reg : Address and length of the register set for the device. First pair
> +   is the USB subsystem specific register set.  Second pair is the
> +   USB subsystem PHY control register set.
> + - interrupts : The irq number of this device that is used to interrupt the
> +   MPU.
> + - ranges: allows valid 1:1 translation between child's address space and
> +   parent's address space.
> + - clocks: Clock IDs array as required by the controller.
> + - clock-names: names of clocks correseponding to IDs in the clock property.
> +
> +Sub-nodes:
> +The dwc3 core should be added as subnode to Keystone DWC3 glue.
> +- dwc3 :
> +   The binding details of dwc3 can be found in:
> +   Documentation/devicetree/bindings/usb/dwc3.txt
> +
> +Example:
> +	usb: usb@2680000 {
> +		compatible = "ti,keystone-dwc3";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		reg = <0x2680000 0x10000
> +		       0x2620738 32>;
> +		clocks = <&clkusb>;
> +		clock-names = "usb";
> +		interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> +		ranges;
> +
> +		dwc3@2690000 {
> +			compatible = "synopsys,dwc3";
> +			reg = <0x2690000 0x70000>;
> +			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> +			usb-phy = <&usb2_phy>, <&usb3_phy>;
> +		};
> +	};
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index f6d6d9e..1e1049c 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -181,5 +181,32 @@
>  			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
>  			clocks = <&clkspi>;
>  		};
> +
> +		usb2_phy: usb2_phy {
> +			compatible = "usb-nop-xceiv";
> +		};
> +
> +		usb3_phy: usb3_phy {
> +			compatible = "usb-nop-xceiv";
> +		};

you actually have some phy registers which need to be fiddled with. I'd
suggest implementing this the same way phy-am335x.c is implemented. It
still reuses most of phy-generic.c, but it has some hooks to implement
->init() and ->shutdown(), which seem to be the only methods you need.

BTW, some preliminary TRM coming my way would be cool, so I can better
understand how this HW behaves. A board would also go a long way, so I
could test this myself (we are part of the same company anyway).

cheers
Santosh Shilimkar Nov. 25, 2013, 9:04 p.m. UTC | #2
On Monday 25 November 2013 03:42 PM, Felipe Balbi wrote:
> Hi,
> 
> On Mon, Nov 25, 2013 at 03:16:20PM -0500, WingMan Kwok wrote:
>> Added device tree support for TI's Keystone USB driver and updated the
>> Documentation with device tree binding information.
>>
>> On Keystone II platforms, we use no-op phy driver.
>>
>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
>> ---

[...]

> BTW, some preliminary TRM coming my way would be cool, so I can better
> understand how this HW behaves. A board would also go a long way, so I
> could test this myself (we are part of the same company anyway).
> 
TRM documentation is bit different. There is no single TRM which has all
the information but different chapters called user guides. For Keystone
USB, the user guide isn't ready yet but there is an internal version for
which we will send you a link. 

Boards are hard to get for now but we can see next year.

Regards,
Santosh
Felipe Balbi Nov. 25, 2013, 9:06 p.m. UTC | #3
On Mon, Nov 25, 2013 at 04:04:47PM -0500, Santosh Shilimkar wrote:
> On Monday 25 November 2013 03:42 PM, Felipe Balbi wrote:
> > Hi,
> > 
> > On Mon, Nov 25, 2013 at 03:16:20PM -0500, WingMan Kwok wrote:
> >> Added device tree support for TI's Keystone USB driver and updated the
> >> Documentation with device tree binding information.
> >>
> >> On Keystone II platforms, we use no-op phy driver.
> >>
> >> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> >> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> >> ---
> 
> [...]
> 
> > BTW, some preliminary TRM coming my way would be cool, so I can better
> > understand how this HW behaves. A board would also go a long way, so I
> > could test this myself (we are part of the same company anyway).
> > 
> TRM documentation is bit different. There is no single TRM which has all
> the information but different chapters called user guides. For Keystone
> USB, the user guide isn't ready yet but there is an internal version for
> which we will send you a link. 
> 
> Boards are hard to get for now but we can see next year.

fair enough, documentation already helps a lot though.
George Cherian Nov. 27, 2013, 9:59 a.m. UTC | #4
On 11/26/2013 1:46 AM, WingMan Kwok wrote:
> Added device tree support for TI's Keystone USB driver and updated the
> Documentation with device tree binding information.
>
> On Keystone II platforms, we use no-op phy driver.
>
> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
> ---
>   .../devicetree/bindings/usb/keystone-usb.txt       |   43 ++++++++++++++++++++
>   arch/arm/boot/dts/keystone.dtsi                    |   27 ++++++++++++
>   2 files changed, 70 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
> new file mode 100644
> index 0000000..a67de8f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
> @@ -0,0 +1,43 @@
> +TI Keystone Soc USB Controller
> +
> +DWC3 GLUE
> +
> +Required properties:
> + - compatible: should be "ti,keystone-dwc3".
> + - #address-cells, #size-cells : should be '1' if the device has sub-nodes
> +   with 'reg' property.
> + - reg : Address and length of the register set for the device. First pair
> +   is the USB subsystem specific register set.  Second pair is the
> +   USB subsystem PHY control register set.
> + - interrupts : The irq number of this device that is used to interrupt the
> +   MPU.
> + - ranges: allows valid 1:1 translation between child's address space and
> +   parent's address space.
> + - clocks: Clock IDs array as required by the controller.
> + - clock-names: names of clocks correseponding to IDs in the clock property.
> +
> +Sub-nodes:
> +The dwc3 core should be added as subnode to Keystone DWC3 glue.
> +- dwc3 :
> +   The binding details of dwc3 can be found in:
> +   Documentation/devicetree/bindings/usb/dwc3.txt
> +
> +Example:
> +	usb: usb@2680000 {
> +		compatible = "ti,keystone-dwc3";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		reg = <0x2680000 0x10000
> +		       0x2620738 32>;
> +		clocks = <&clkusb>;
> +		clock-names = "usb";
> +		interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> +		ranges;
> +
> +		dwc3@2690000 {
> +			compatible = "synopsys,dwc3";
> +			reg = <0x2690000 0x70000>;
> +			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> +			usb-phy = <&usb2_phy>, <&usb3_phy>;
> +		};
> +	};
> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
> index f6d6d9e..1e1049c 100644
> --- a/arch/arm/boot/dts/keystone.dtsi
> +++ b/arch/arm/boot/dts/keystone.dtsi
> @@ -181,5 +181,32 @@
>   			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
>   			clocks = <&clkspi>;
>   		};
> +
> +		usb2_phy: usb2_phy {
> +			compatible = "usb-nop-xceiv";
> +		};
> +
> +		usb3_phy: usb3_phy {
> +			compatible = "usb-nop-xceiv";
> +		};
> +
> +		usb: usb@2680000 {
> +			compatible = "ti,keystone-dwc3";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			reg = <0x2680000 0x10000
> +			       0x2620738 32>;
> +			clocks = <&clkusb>;
> +			clock-names = "usb";
> +			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;

You don't have seperate interrrupt for wrapper and core?
Is it the same interrupt shared between XHCI,DWC3 and wrapper?

> +			ranges;
> +
> +			dwc3@2690000 {
> +				compatible = "synopsys,dwc3";
> +				reg = <0x2690000 0x70000>;
> +				interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> +				usb-phy = <&usb2_phy>, <&usb3_phy>;
> +			};
> +		};
>   	};
>   };
Santosh Shilimkar Nov. 27, 2013, 8:24 p.m. UTC | #5
On Wednesday 27 November 2013 04:59 AM, George Cherian wrote:
> On 11/26/2013 1:46 AM, WingMan Kwok wrote:
>> Added device tree support for TI's Keystone USB driver and updated the
>> Documentation with device tree binding information.
>>
>> On Keystone II platforms, we use no-op phy driver.
>>
>> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
>> ---
>>   .../devicetree/bindings/usb/keystone-usb.txt       |   43 ++++++++++++++++++++
>>   arch/arm/boot/dts/keystone.dtsi                    |   27 ++++++++++++
>>   2 files changed, 70 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/usb/keystone-usb.txt
>>
[...]

>> diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
>> index f6d6d9e..1e1049c 100644
>> --- a/arch/arm/boot/dts/keystone.dtsi
>> +++ b/arch/arm/boot/dts/keystone.dtsi
>> @@ -181,5 +181,32 @@
>>               interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
>>               clocks = <&clkspi>;
>>           };
>> +
>> +        usb2_phy: usb2_phy {
>> +            compatible = "usb-nop-xceiv";
>> +        };
>> +
>> +        usb3_phy: usb3_phy {
>> +            compatible = "usb-nop-xceiv";
>> +        };
>> +
>> +        usb: usb@2680000 {
>> +            compatible = "ti,keystone-dwc3";
>> +            #address-cells = <1>;
>> +            #size-cells = <1>;
>> +            reg = <0x2680000 0x10000
>> +                   0x2620738 32>;
>> +            clocks = <&clkusb>;
>> +            clock-names = "usb";
>> +            interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
> 
> You don't have seperate interrrupt for wrapper and core?
> Is it the same interrupt shared between XHCI,DWC3 and wrapper?
>
You don't need actually two seperate interrupts.
DWC3 core actually registers IRQ for XHCI. And in OMAP case, there
is one more IRQ in wrapper. After checking with Felipe, it seems
the OMAP wrapper interrupt was more for debug purpose than any real
use.

On Keystone only one IRQ is used and the handling is managed
through IRQF_SHARED and that is also mainly because the IRQ
ack needs special write to EOI register unlike OMAP.

Regards,
Santosh
diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 0000000..a67de8f
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,43 @@ 
+TI Keystone Soc USB Controller
+
+DWC3 GLUE
+
+Required properties:
+ - compatible: should be "ti,keystone-dwc3".
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property.
+ - reg : Address and length of the register set for the device. First pair
+   is the USB subsystem specific register set.  Second pair is the
+   USB subsystem PHY control register set.
+ - interrupts : The irq number of this device that is used to interrupt the
+   MPU.
+ - ranges: allows valid 1:1 translation between child's address space and
+   parent's address space.
+ - clocks: Clock IDs array as required by the controller.
+ - clock-names: names of clocks correseponding to IDs in the clock property.
+
+Sub-nodes:
+The dwc3 core should be added as subnode to Keystone DWC3 glue.
+- dwc3 :
+   The binding details of dwc3 can be found in:
+   Documentation/devicetree/bindings/usb/dwc3.txt
+
+Example:
+	usb: usb@2680000 {
+		compatible = "ti,keystone-dwc3";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x2680000 0x10000
+		       0x2620738 32>;
+		clocks = <&clkusb>;
+		clock-names = "usb";
+		interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+		ranges;
+
+		dwc3@2690000 {
+			compatible = "synopsys,dwc3";
+			reg = <0x2690000 0x70000>;
+			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+			usb-phy = <&usb2_phy>, <&usb3_phy>;
+		};
+	};
diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
index f6d6d9e..1e1049c 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -181,5 +181,32 @@ 
 			interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
 			clocks = <&clkspi>;
 		};
+
+		usb2_phy: usb2_phy {
+			compatible = "usb-nop-xceiv";
+		};
+
+		usb3_phy: usb3_phy {
+			compatible = "usb-nop-xceiv";
+		};
+
+		usb: usb@2680000 {
+			compatible = "ti,keystone-dwc3";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg = <0x2680000 0x10000
+			       0x2620738 32>;
+			clocks = <&clkusb>;
+			clock-names = "usb";
+			interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+			ranges;
+
+			dwc3@2690000 {
+				compatible = "synopsys,dwc3";
+				reg = <0x2690000 0x70000>;
+				interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
+				usb-phy = <&usb2_phy>, <&usb3_phy>;
+			};
+		};
 	};
 };