diff mbox

[V3,1/2] ARM: imx: add vddsoc/pu setpoint info into dts

Message ID 1387402010-31749-1-git-send-email-b20788@freescale.com (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Anson Huang Dec. 18, 2013, 9:26 p.m. UTC 
i.MX6Q needs to update vddarm, vddsoc/pu regulators when cpu freq
is changed, each setpoint has different voltage, so we need to
pass vddarm, vddsoc/pu's freq-voltage info from dts together.

Signed-off-by: Anson Huang <b20788@freescale.com>
---
 .../devicetree/bindings/cpufreq/cpufreq-imx6.txt   |   56 ++++++++++++++++++++
 arch/arm/boot/dts/imx6q.dtsi                       |    7 +++
 2 files changed, 63 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt

Comments

Fabio Estevam Dec. 18, 2013, 11:08 a.m. UTC | #1 
Hi Anson,

On Wed, Dec 18, 2013 at 7:26 PM, Anson Huang <b20788@freescale.com> wrote:

> +  Documentation/devicetree/bindings/regulator/regulator.txt for details.
> +  arm-supply: vddarm input.
> +  pu-supply: vddpu input.
> +  soc-supply: vddsoc input.

I found these messages confusing, as someone may think that you are
referring to the VDD_ARM_IN/VDD_ARM23_IN and VDD_SOC_IN, which are
really inputs.

What about doing this instead?

arm-supply: VDDARM LDO output
pu-supply:  VDDPU LDO output
soc-supply: VDDSOC LDO output

Regards,

Fabio Estevam
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Anson.Huang@freescale.com Dec. 18, 2013, 12:01 p.m. UTC | #2 
Sent from Anson's iPhone

> ? 2013?12?18??19:08?"Fabio Estevam" <festevam@gmail.com> ???

> 

> Hi Anson,

> 

>> On Wed, Dec 18, 2013 at 7:26 PM, Anson Huang <b20788@freescale.com> wrote:

>> 

>> +  Documentation/devicetree/bindings/regulator/regulator.txt for details.

>> +  arm-supply: vddarm input.

>> +  pu-supply: vddpu input.

>> +  soc-supply: vddsoc input.

> 

> I found these messages confusing, as someone may think that you are

> referring to the VDD_ARM_IN/VDD_ARM23_IN and VDD_SOC_IN, which are

> really inputs.

> 

> What about doing this instead?

> 

> arm-supply: VDDARM LDO output

> pu-supply:  VDDPU LDO output

> soc-supply: VDDSOC LDO output


I think they should know these regulators mean the arm, soc/pu's
real working voltage, as you know, our i.MX6 also support LDO bypass mode, then these regulators can be
VDDXXX_IN. that is why I use vddxxx
input, not vddxxx LDO input.Thanks!
> 

> Regards,

> 

> Fabio Estevam

> 

>
Shawn Guo Dec. 18, 2013, 2:21 p.m. UTC | #3 
On Wed, Dec 18, 2013 at 04:26:49PM -0500, Anson Huang wrote:
> i.MX6Q needs to update vddarm, vddsoc/pu regulators when cpu freq
> is changed, each setpoint has different voltage, so we need to
> pass vddarm, vddsoc/pu's freq-voltage info from dts together.
> 
> Signed-off-by: Anson Huang <b20788@freescale.com>
> ---
>  .../devicetree/bindings/cpufreq/cpufreq-imx6.txt   |   56 ++++++++++++++++++++

As I said in V2 review, the device tree binding doc change should be
part of driver patch (patch #2 in this case) or a separate patch, but
never be in the same patch as DTS change.

Shawn

>  arch/arm/boot/dts/imx6q.dtsi                       |    7 +++
>  2 files changed, 63 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt
> 
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt
> new file mode 100644
> index 0000000..cf1c5f7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt
> @@ -0,0 +1,56 @@
> +i.MX6 cpufreq driver
> +-------------------
> +
> +i.MX6 SoC cpufreq driver for CPU frequency scaling.
> +
> +This binding doc defines properties that must be put in the /cpus/cpu@0 node,
> +please refer to Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt
> +for detail.
> +
> +Required properties:
> +- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
> +  for details.
> +- clocks: Specify clocks that need to be used when cpu frequency is scaled,
> +  refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
> +  details.
> +- clock-names: List of clock input name strings sorted in the same order as the
> +  clocks property, refer to Documentation/devicetree/bindings/clock/clock-bindings.txt
> +  for details.
> +- xxx-supply: Input voltage supply regulator, refer to
> +  Documentation/devicetree/bindings/regulator/regulator.txt for details.
> +  arm-supply: vddarm input.
> +  pu-supply: vddpu input.
> +  soc-supply: vddsoc input.
> +
> +Optional properties:
> +- fsl,soc-operating-points: Specify vddsoc/pu voltage settings that must
> +  go with cpu0's operating-points.
> +- clock-latency: Specify the possible maximum transition latency for clock,
> +  in unit of nanoseconds.
> +
> +Examples:
> +
> +	cpu@0 {
> +		operating-points = <
> +			/* kHz    uV */
> +			1200000 1275000
> +			996000  1250000
> +			792000  1150000
> +			396000  975000
> +		>;
> +		fsl,soc-operating-points = <
> +			/* ARM kHz  SOC-PU uV */
> +			1200000 1275000
> +			996000	1250000
> +			792000	1175000
> +			396000	1175000
> +		>;
> +		clock-latency = <61036>; /* two CLK32 periods */
> +		clocks = <&clks 104>, <&clks 6>, <&clks 16>,
> +			 <&clks 17>, <&clks 170>;
> +		clock-names = "arm", "pll2_pfd2_396m", "step",
> +			      "pll1_sw", "pll1_sys";
> +		arm-supply = <&reg_arm>;
> +		pu-supply = <&reg_pu>;
> +		soc-supply = <&reg_soc>;
> +	};
> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
> index e7e8332..021e0cb 100644
> --- a/arch/arm/boot/dts/imx6q.dtsi
> +++ b/arch/arm/boot/dts/imx6q.dtsi
> @@ -30,6 +30,13 @@
>  				792000  1150000
>  				396000  975000
>  			>;
> +			fsl,soc-operating-points = <
> +				/* ARM kHz  SOC-PU uV */
> +				1200000 1275000
> +				996000	1250000
> +				792000	1175000
> +				396000	1175000
> +			>;
>  			clock-latency = <61036>; /* two CLK32 periods */
>  			clocks = <&clks 104>, <&clks 6>, <&clks 16>,
>  				 <&clks 17>, <&clks 170>;
> -- 
> 1.7.9.5
> 
> 

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Anson.Huang@freescale.com Dec. 18, 2013, 11:31 p.m. UTC | #4 
Sent from Anson's iPhone

> ? 2013?12?18??22:21?"Shawn Guo" <shawn.guo@linaro.org> ???

> 

>> On Wed, Dec 18, 2013 at 04:26:49PM -0500, Anson Huang wrote:

>> i.MX6Q needs to update vddarm, vddsoc/pu regulators when cpu freq

>> is changed, each setpoint has different voltage, so we need to

>> pass vddarm, vddsoc/pu's freq-voltage info from dts together.

>> 

>> Signed-off-by: Anson Huang <b20788@freescale.com>

>> ---

>> .../devicetree/bindings/cpufreq/cpufreq-imx6.txt   |   56 ++++++++++++++++++++

> 

> As I said in V2 review, the device tree binding doc change should be

> part of driver patch (patch #2 in this case) or a separate patch, but

> never be in the same patch as DTS change.


I missed that one, sorry for that, then I will send out a V4 patch set.
> 

> Shawn

> 

>> arch/arm/boot/dts/imx6q.dtsi                       |    7 +++

>> 2 files changed, 63 insertions(+)

>> create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt

>> 

>> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt

>> new file mode 100644

>> index 0000000..cf1c5f7

>> --- /dev/null

>> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt

>> @@ -0,0 +1,56 @@

>> +i.MX6 cpufreq driver

>> +-------------------

>> +

>> +i.MX6 SoC cpufreq driver for CPU frequency scaling.

>> +

>> +This binding doc defines properties that must be put in the /cpus/cpu@0 node,

>> +please refer to Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt

>> +for detail.

>> +

>> +Required properties:

>> +- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt

>> +  for details.

>> +- clocks: Specify clocks that need to be used when cpu frequency is scaled,

>> +  refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for

>> +  details.

>> +- clock-names: List of clock input name strings sorted in the same order as the

>> +  clocks property, refer to Documentation/devicetree/bindings/clock/clock-bindings.txt

>> +  for details.

>> +- xxx-supply: Input voltage supply regulator, refer to

>> +  Documentation/devicetree/bindings/regulator/regulator.txt for details.

>> +  arm-supply: vddarm input.

>> +  pu-supply: vddpu input.

>> +  soc-supply: vddsoc input.

>> +

>> +Optional properties:

>> +- fsl,soc-operating-points: Specify vddsoc/pu voltage settings that must

>> +  go with cpu0's operating-points.

>> +- clock-latency: Specify the possible maximum transition latency for clock,

>> +  in unit of nanoseconds.

>> +

>> +Examples:

>> +

>> +    cpu@0 {

>> +        operating-points = <

>> +            /* kHz    uV */

>> +            1200000 1275000

>> +            996000  1250000

>> +            792000  1150000

>> +            396000  975000

>> +        >;

>> +        fsl,soc-operating-points = <

>> +            /* ARM kHz  SOC-PU uV */

>> +            1200000 1275000

>> +            996000    1250000

>> +            792000    1175000

>> +            396000    1175000

>> +        >;

>> +        clock-latency = <61036>; /* two CLK32 periods */

>> +        clocks = <&clks 104>, <&clks 6>, <&clks 16>,

>> +             <&clks 17>, <&clks 170>;

>> +        clock-names = "arm", "pll2_pfd2_396m", "step",

>> +                  "pll1_sw", "pll1_sys";

>> +        arm-supply = <&reg_arm>;

>> +        pu-supply = <&reg_pu>;

>> +        soc-supply = <&reg_soc>;

>> +    };

>> diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi

>> index e7e8332..021e0cb 100644

>> --- a/arch/arm/boot/dts/imx6q.dtsi

>> +++ b/arch/arm/boot/dts/imx6q.dtsi

>> @@ -30,6 +30,13 @@

>>                792000  1150000

>>                396000  975000

>>            >;

>> +            fsl,soc-operating-points = <

>> +                /* ARM kHz  SOC-PU uV */

>> +                1200000 1275000

>> +                996000    1250000

>> +                792000    1175000

>> +                396000    1175000

>> +            >;

>>            clock-latency = <61036>; /* two CLK32 periods */

>>            clocks = <&clks 104>, <&clks 6>, <&clks 16>,

>>                 <&clks 17>, <&clks 170>;

>> -- 

>> 1.7.9.5

>
Anson.Huang@freescale.com Dec. 19, 2013, 2:13 a.m. UTC | #5 
Best Regards.
Anson huang ???
 
Freescale Semiconductor Shanghai
?????????192?A?2?
201203
Tel:021-28937058


>-----Original Message-----

>From: Huang Yongcai-B20788

>Sent: Wednesday, December 18, 2013 8:01 PM

>To: Fabio Estevam

>Cc: Huang Yongcai-B20788; Shawn Guo; rjw@rjwysocki.net; Viresh Kumar;

>devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;

>cpufreq@vger.kernel.org; linux-pm@vger.kernel.org

>Subject: Re: [PATCH V3 1/2] ARM: imx: add vddsoc/pu setpoint info into dts

>

>

>

>Sent from Anson's iPhone

>

>> ? 2013?12?18??19:08?"Fabio Estevam" <festevam@gmail.com> ???

>>

>> Hi Anson,

>>

>>> On Wed, Dec 18, 2013 at 7:26 PM, Anson Huang <b20788@freescale.com> wrote:

>>>

>>> +  Documentation/devicetree/bindings/regulator/regulator.txt for details.

>>> +  arm-supply: vddarm input.

>>> +  pu-supply: vddpu input.

>>> +  soc-supply: vddsoc input.

>>

>> I found these messages confusing, as someone may think that you are

>> referring to the VDD_ARM_IN/VDD_ARM23_IN and VDD_SOC_IN, which are

>> really inputs.

>>

>> What about doing this instead?

>>

>> arm-supply: VDDARM LDO output

>> pu-supply:  VDDPU LDO output

>> soc-supply: VDDSOC LDO output

>

>I think they should know these regulators mean the arm, soc/pu's real working

>voltage, as you know, our i.MX6 also support LDO bypass mode, then these

>regulators can be VDDXXX_IN. that is why I use vddxxx input, not vddxxx LDO

>input.Thanks!


After re-consideration, I think below should be better:
arm-supply: regulator node supplying arm.
pu-supply: regulator node supplying pu.
soc-supply: regulator node supplying soc.

Anson 


>>

>> Regards,

>>

>> Fabio Estevam

>>

>>
Fabio Estevam Dec. 19, 2013, 2:30 a.m. UTC | #6 
On Thu, Dec 19, 2013 at 12:13 AM, Anson.Huang@freescale.com
<Anson.Huang@freescale.com> wrote:
> After re-consideration, I think below should be better:
> arm-supply: regulator node supplying arm.
> pu-supply: regulator node supplying pu.
> soc-supply: regulator node supplying soc.

Yes, this looks better.

Regards,

Fabio Estevam
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diff mbox

Patch

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt
new file mode 100644
index 0000000..cf1c5f7
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-imx6.txt
@@ -0,0 +1,56 @@ 
+i.MX6 cpufreq driver
+-------------------
+
+i.MX6 SoC cpufreq driver for CPU frequency scaling.
+
+This binding doc defines properties that must be put in the /cpus/cpu@0 node,
+please refer to Documentation/devicetree/bindings/cpufreq/cpufreq-cpu0.txt
+for detail.
+
+Required properties:
+- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
+  for details.
+- clocks: Specify clocks that need to be used when cpu frequency is scaled,
+  refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
+  details.
+- clock-names: List of clock input name strings sorted in the same order as the
+  clocks property, refer to Documentation/devicetree/bindings/clock/clock-bindings.txt
+  for details.
+- xxx-supply: Input voltage supply regulator, refer to
+  Documentation/devicetree/bindings/regulator/regulator.txt for details.
+  arm-supply: vddarm input.
+  pu-supply: vddpu input.
+  soc-supply: vddsoc input.
+
+Optional properties:
+- fsl,soc-operating-points: Specify vddsoc/pu voltage settings that must
+  go with cpu0's operating-points.
+- clock-latency: Specify the possible maximum transition latency for clock,
+  in unit of nanoseconds.
+
+Examples:
+
+	cpu@0 {
+		operating-points = <
+			/* kHz    uV */
+			1200000 1275000
+			996000  1250000
+			792000  1150000
+			396000  975000
+		>;
+		fsl,soc-operating-points = <
+			/* ARM kHz  SOC-PU uV */
+			1200000 1275000
+			996000	1250000
+			792000	1175000
+			396000	1175000
+		>;
+		clock-latency = <61036>; /* two CLK32 periods */
+		clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+			 <&clks 17>, <&clks 170>;
+		clock-names = "arm", "pll2_pfd2_396m", "step",
+			      "pll1_sw", "pll1_sys";
+		arm-supply = <&reg_arm>;
+		pu-supply = <&reg_pu>;
+		soc-supply = <&reg_soc>;
+	};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index e7e8332..021e0cb 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -30,6 +30,13 @@ 
 				792000  1150000
 				396000  975000
 			>;
+			fsl,soc-operating-points = <
+				/* ARM kHz  SOC-PU uV */
+				1200000 1275000
+				996000	1250000
+				792000	1175000
+				396000	1175000
+			>;
 			clock-latency = <61036>; /* two CLK32 periods */
 			clocks = <&clks 104>, <&clks 6>, <&clks 16>,
 				 <&clks 17>, <&clks 170>;