| Message ID | 1387637671-24152-1-git-send-email-maraeo@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, Dec 21, 2013 at 9:54 AM, Marek Olšák <maraeo@gmail.com> wrote: > From: Marek Olšák <marek.olsak@amd.com> > > Needed by userspace for HTILE buffer size calculations. > > Signed-off-by: Marek Olšák <marek.olsak@amd.com> > --- > > It returns 2 on Bonaire. I hope it's correct. There are two RBs per SE and there are two SEs on bonaire. So I think it should be 4. it might be better to export the enabled_rb or disabled_rb mask so we know which physical rbs are enabled. That way we can calculate PA_SC_RASTER_CONFIG and PA_SC_RASTER_CONFIG_1 properly in the mesa driver for harvest cards. Alex > > drivers/gpu/drm/radeon/cik.c | 7 ++++++- > drivers/gpu/drm/radeon/radeon_kms.c | 9 +++++++++ > drivers/gpu/drm/radeon/si.c | 7 ++++++- > include/uapi/drm/radeon_drm.h | 2 ++ > 4 files changed, 23 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c > index b43a3a3..ccbbeb1 100644 > --- a/drivers/gpu/drm/radeon/cik.c > +++ b/drivers/gpu/drm/radeon/cik.c > @@ -3094,6 +3094,7 @@ static void cik_setup_rb(struct radeon_device *rdev, > u32 data, mask; > u32 disabled_rbs = 0; > u32 enabled_rbs = 0; > + u32 num_enabled_rbs = 0; > > for (i = 0; i < se_num; i++) { > for (j = 0; j < sh_per_se; j++) { > @@ -3109,8 +3110,10 @@ static void cik_setup_rb(struct radeon_device *rdev, > > mask = 1; > for (i = 0; i < max_rb_num; i++) { > - if (!(disabled_rbs & mask)) > + if (!(disabled_rbs & mask)) { > enabled_rbs |= mask; > + num_enabled_rbs++; > + } > mask <<= 1; > } > > @@ -3141,6 +3144,8 @@ static void cik_setup_rb(struct radeon_device *rdev, > WREG32(PA_SC_RASTER_CONFIG, data); > } > cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); > + > + rdev->config.cik.num_backends_per_se = num_enabled_rbs; > } > > /** > diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c > index 55d0b47..39d22de 100644 > --- a/drivers/gpu/drm/radeon/radeon_kms.c > +++ b/drivers/gpu/drm/radeon/radeon_kms.c > @@ -461,6 +461,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) > case RADEON_INFO_SI_CP_DMA_COMPUTE: > *value = 1; > break; > + case RADEON_INFO_SI_NUM_RENDER_BACKENDS: > + if (rdev->family >= CHIP_BONAIRE) { > + *value = rdev->config.cik.num_backends_per_se; > + } else if (rdev->family >= CHIP_TAHITI) { > + *value = rdev->config.si.num_backends_per_se; > + } else { > + DRM_DEBUG_KMS("INFO_SI_NUM_RENDER_BACKENDS is si+ only!\n"); > + } > + break; > default: > DRM_DEBUG_KMS("Invalid request %d\n", info->request); > return -EINVAL; > diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c > index a36736d..0e730d6 100644 > --- a/drivers/gpu/drm/radeon/si.c > +++ b/drivers/gpu/drm/radeon/si.c > @@ -2838,6 +2838,7 @@ static void si_setup_rb(struct radeon_device *rdev, > u32 data, mask; > u32 disabled_rbs = 0; > u32 enabled_rbs = 0; > + u32 num_enabled_rbs = 0; > > for (i = 0; i < se_num; i++) { > for (j = 0; j < sh_per_se; j++) { > @@ -2850,8 +2851,10 @@ static void si_setup_rb(struct radeon_device *rdev, > > mask = 1; > for (i = 0; i < max_rb_num; i++) { > - if (!(disabled_rbs & mask)) > + if (!(disabled_rbs & mask)) { > enabled_rbs |= mask; > + num_enabled_rbs++; > + } > mask <<= 1; > } > > @@ -2876,6 +2879,8 @@ static void si_setup_rb(struct radeon_device *rdev, > WREG32(PA_SC_RASTER_CONFIG, data); > } > si_select_se_sh(rdev, 0xffffffff, 0xffffffff); > + > + rdev->config.si.num_backends_per_se = num_enabled_rbs; > } > > static void si_gpu_init(struct radeon_device *rdev) > diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h > index 2f3f7ea..a64713a 100644 > --- a/include/uapi/drm/radeon_drm.h > +++ b/include/uapi/drm/radeon_drm.h > @@ -983,6 +983,8 @@ struct drm_radeon_cs { > #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 > /* CIK macrotile mode array */ > #define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18 > +/* query the number of render backends */ > +#define RADEON_INFO_SI_NUM_RENDER_BACKENDS 0x19 > > > struct drm_radeon_info { > -- > 1.8.3.2 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/dri-devel
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c index b43a3a3..ccbbeb1 100644 --- a/drivers/gpu/drm/radeon/cik.c +++ b/drivers/gpu/drm/radeon/cik.c @@ -3094,6 +3094,7 @@ static void cik_setup_rb(struct radeon_device *rdev, u32 data, mask; u32 disabled_rbs = 0; u32 enabled_rbs = 0; + u32 num_enabled_rbs = 0; for (i = 0; i < se_num; i++) { for (j = 0; j < sh_per_se; j++) { @@ -3109,8 +3110,10 @@ static void cik_setup_rb(struct radeon_device *rdev, mask = 1; for (i = 0; i < max_rb_num; i++) { - if (!(disabled_rbs & mask)) + if (!(disabled_rbs & mask)) { enabled_rbs |= mask; + num_enabled_rbs++; + } mask <<= 1; } @@ -3141,6 +3144,8 @@ static void cik_setup_rb(struct radeon_device *rdev, WREG32(PA_SC_RASTER_CONFIG, data); } cik_select_se_sh(rdev, 0xffffffff, 0xffffffff); + + rdev->config.cik.num_backends_per_se = num_enabled_rbs; } /** diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 55d0b47..39d22de 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -461,6 +461,15 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) case RADEON_INFO_SI_CP_DMA_COMPUTE: *value = 1; break; + case RADEON_INFO_SI_NUM_RENDER_BACKENDS: + if (rdev->family >= CHIP_BONAIRE) { + *value = rdev->config.cik.num_backends_per_se; + } else if (rdev->family >= CHIP_TAHITI) { + *value = rdev->config.si.num_backends_per_se; + } else { + DRM_DEBUG_KMS("INFO_SI_NUM_RENDER_BACKENDS is si+ only!\n"); + } + break; default: DRM_DEBUG_KMS("Invalid request %d\n", info->request); return -EINVAL; diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index a36736d..0e730d6 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -2838,6 +2838,7 @@ static void si_setup_rb(struct radeon_device *rdev, u32 data, mask; u32 disabled_rbs = 0; u32 enabled_rbs = 0; + u32 num_enabled_rbs = 0; for (i = 0; i < se_num; i++) { for (j = 0; j < sh_per_se; j++) { @@ -2850,8 +2851,10 @@ static void si_setup_rb(struct radeon_device *rdev, mask = 1; for (i = 0; i < max_rb_num; i++) { - if (!(disabled_rbs & mask)) + if (!(disabled_rbs & mask)) { enabled_rbs |= mask; + num_enabled_rbs++; + } mask <<= 1; } @@ -2876,6 +2879,8 @@ static void si_setup_rb(struct radeon_device *rdev, WREG32(PA_SC_RASTER_CONFIG, data); } si_select_se_sh(rdev, 0xffffffff, 0xffffffff); + + rdev->config.si.num_backends_per_se = num_enabled_rbs; } static void si_gpu_init(struct radeon_device *rdev) diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h index 2f3f7ea..a64713a 100644 --- a/include/uapi/drm/radeon_drm.h +++ b/include/uapi/drm/radeon_drm.h @@ -983,6 +983,8 @@ struct drm_radeon_cs { #define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 /* CIK macrotile mode array */ #define RADEON_INFO_CIK_MACROTILE_MODE_ARRAY 0x18 +/* query the number of render backends */ +#define RADEON_INFO_SI_NUM_RENDER_BACKENDS 0x19 struct drm_radeon_info {