diff mbox

[v2,08/10] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls

Message ID 1387203165-5553-9-git-send-email-james.hogan@imgtec.com (mailing list archive)
State New, archived
Headers show

Commit Message

James Hogan Dec. 16, 2013, 2:12 p.m. UTC 
From: Sanjay Lal <sanjayl@kymasys.com>

COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via
ioctls.

Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
---
Changes in v2:
 - Expand commit message
 - Remove #ifdef CONFIG_KVM since it's guarded by kvm_enabled() already
---
 hw/mips/mips_int.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Aurelien Jarno Dec. 21, 2013, 3:41 p.m. UTC | #1 
On Mon, Dec 16, 2013 at 02:12:43PM +0000, James Hogan wrote:
> From: Sanjay Lal <sanjayl@kymasys.com>
> 
> COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via
> ioctls.
> 
> Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
> Changes in v2:
>  - Expand commit message
>  - Remove #ifdef CONFIG_KVM since it's guarded by kvm_enabled() already
> ---
>  hw/mips/mips_int.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
> index 7dbd24d..1b9981e 100644
> --- a/hw/mips/mips_int.c
> +++ b/hw/mips/mips_int.c
> @@ -23,6 +23,8 @@
>  #include "hw/hw.h"
>  #include "hw/mips/cpudevs.h"
>  #include "cpu.h"
> +#include "sysemu/kvm.h"
> +#include "kvm_mips.h"
>  
>  static void cpu_mips_irq_request(void *opaque, int irq, int level)
>  {
> @@ -35,8 +37,17 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
>  
>      if (level) {
>          env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
> +
> +        if (kvm_enabled() && irq == 2) {
> +            kvm_mips_set_interrupt(env, irq, level);
> +        }
> +
>      } else {
>          env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
> +
> +        if (kvm_enabled() && irq == 2) {
> +            kvm_mips_set_interrupt(env, irq, level);
> +        }
>      }
>  
>      if (env->CP0_Cause & CP0Ca_IP_mask) {

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Peter Maydell Dec. 21, 2013, 8:40 p.m. UTC | #2 
On 16 December 2013 14:12, James Hogan <james.hogan@imgtec.com> wrote:
> From: Sanjay Lal <sanjayl@kymasys.com>
>
> COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via
> ioctls.
>
> Signed-off-by: Sanjay Lal <sanjayl@kymasys.com>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> ---
> Changes in v2:
>  - Expand commit message
>  - Remove #ifdef CONFIG_KVM since it's guarded by kvm_enabled() already
> ---
>  hw/mips/mips_int.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
> index 7dbd24d..1b9981e 100644
> --- a/hw/mips/mips_int.c
> +++ b/hw/mips/mips_int.c
> @@ -23,6 +23,8 @@
>  #include "hw/hw.h"
>  #include "hw/mips/cpudevs.h"
>  #include "cpu.h"
> +#include "sysemu/kvm.h"
> +#include "kvm_mips.h"
>
>  static void cpu_mips_irq_request(void *opaque, int irq, int level)
>  {
> @@ -35,8 +37,17 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level)
>
>      if (level) {
>          env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
> +
> +        if (kvm_enabled() && irq == 2) {
> +            kvm_mips_set_interrupt(env, irq, level);
> +        }
> +
>      } else {
>          env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
> +
> +        if (kvm_enabled() && irq == 2) {
> +            kvm_mips_set_interrupt(env, irq, level);
> +        }
>      }
>
>      if (env->CP0_Cause & CP0Ca_IP_mask) {

For ARM we got rid of the arm_cpu_pic functions (which were more
or less like these) completely, because we can just model CPU
interrupt lines as actual irq lines on the CPU object. See commits
7c1840b686e3 to b643e4b90bb0b. That's not necessary for
KVM support but it might be worth considering as a cleanup for
MIPS at some point: it helps to get the "is this kvm or tcg?" code
out of the device emulation stuff in hw/, and also means there's
less hw/ code grubbing around in CPUState.

thanks
-- PMM
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diff mbox

Patch

diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c
index 7dbd24d..1b9981e 100644
--- a/hw/mips/mips_int.c
+++ b/hw/mips/mips_int.c
@@ -23,6 +23,8 @@ 
 #include "hw/hw.h"
 #include "hw/mips/cpudevs.h"
 #include "cpu.h"
+#include "sysemu/kvm.h"
+#include "kvm_mips.h"
 
 static void cpu_mips_irq_request(void *opaque, int irq, int level)
 {
@@ -35,8 +37,17 @@  static void cpu_mips_irq_request(void *opaque, int irq, int level)
 
     if (level) {
         env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
+
+        if (kvm_enabled() && irq == 2) {
+            kvm_mips_set_interrupt(env, irq, level);
+        }
+
     } else {
         env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
+
+        if (kvm_enabled() && irq == 2) {
+            kvm_mips_set_interrupt(env, irq, level);
+        }
     }
 
     if (env->CP0_Cause & CP0Ca_IP_mask) {