| Message ID | 1389257565-19797-3-git-send-email-wens@csie.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Thu, Jan 09, 2014 at 04:52:39PM +0800, Chen-Yu Tsai wrote: > clock-output-names is now required for most of sunxi clock nodes, to > provide the name of the corresponding clock. Add the new requirements, > exceptions, as well as examples. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Thanks! Maxime
Hi, El 09/01/14 05:52, Chen-Yu Tsai escribió: > clock-output-names is now required for most of sunxi clock nodes, to > provide the name of the corresponding clock. Add the new requirements, > exceptions, as well as examples. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 36 +++++++++++++++++++---- > 1 file changed, 31 insertions(+), 5 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt > index 0c127cd..8a9147d 100644 > --- a/Documentation/devicetree/bindings/clock/sunxi.txt > +++ b/Documentation/devicetree/bindings/clock/sunxi.txt > @@ -44,10 +44,18 @@ Required properties for all clocks: > multiplexed clocks, the list order must match the hardware > programming order. > - #clock-cells : from common clock binding; shall be set to 0 except for > - "allwinner,*-gates-clk" where it shall be set to 1 > + "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk" and > + "allwinner,sun4i-pll6-clk" where it shall be set to 1 > > -Additionally, "allwinner,*-gates-clk" clocks require: > -- clock-output-names : the corresponding gate names that the clock controls > +Additionally, most clocks require "clock-output-names": > +- "allwinner,*-gates-clk" : the corresponding gate names that the clock controls > +- "allwinner,sun4i-pll5-clk" : "pll5_ddr", "pll5_mbus" > +- "allwinner,sun4i-pll6-clk" : "pll6_sata", "pll6_other" > +- "allwinner,sun4i-cpu-clk", "allwinner,sun4i-axi-clk", > + "allwinner,sun4i-ahb-clk", "allwinner,sun4i-ahb-clk", > + "allwinner,sun4i-apb1-mux-clk", "allwinner,sun4i-apb1-clk" > + do not need "clock-output-names" > +- all others clocks : the corresponding module name of that clock As we discussed on IRC, I wonder if such verbosity is actually needed. Maybe we should dictate that all clocks must list their corresponding outputs on clock-output-names (with it being the module name if it only has one output). Cheers, Emilio
Hi Maxime, On Fri, Jan 17, 2014 at 10:55 AM, Emilio López <emilio@elopez.com.ar> wrote: > Hi, > > El 09/01/14 05:52, Chen-Yu Tsai escribió: > >> clock-output-names is now required for most of sunxi clock nodes, to >> provide the name of the corresponding clock. Add the new requirements, >> exceptions, as well as examples. >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> >> --- >> Documentation/devicetree/bindings/clock/sunxi.txt | 36 >> +++++++++++++++++++---- >> 1 file changed, 31 insertions(+), 5 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt >> b/Documentation/devicetree/bindings/clock/sunxi.txt >> index 0c127cd..8a9147d 100644 >> --- a/Documentation/devicetree/bindings/clock/sunxi.txt >> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt >> @@ -44,10 +44,18 @@ Required properties for all clocks: >> multiplexed clocks, the list order must match the hardware >> programming order. >> - #clock-cells : from common clock binding; shall be set to 0 except for >> - "allwinner,*-gates-clk" where it shall be set to 1 >> + "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk" and >> + "allwinner,sun4i-pll6-clk" where it shall be set to 1 >> >> -Additionally, "allwinner,*-gates-clk" clocks require: >> -- clock-output-names : the corresponding gate names that the clock >> controls >> +Additionally, most clocks require "clock-output-names": >> +- "allwinner,*-gates-clk" : the corresponding gate names that the clock >> controls >> +- "allwinner,sun4i-pll5-clk" : "pll5_ddr", "pll5_mbus" >> +- "allwinner,sun4i-pll6-clk" : "pll6_sata", "pll6_other" >> +- "allwinner,sun4i-cpu-clk", "allwinner,sun4i-axi-clk", >> + "allwinner,sun4i-ahb-clk", "allwinner,sun4i-ahb-clk", >> + "allwinner,sun4i-apb1-mux-clk", "allwinner,sun4i-apb1-clk" >> + do not need "clock-output-names" >> +- all others clocks : the corresponding module name of that clock > > > As we discussed on IRC, I wonder if such verbosity is actually needed. Maybe > we should dictate that all clocks must list their corresponding outputs on > clock-output-names (with it being the module name if it only has one > output). Maxime, could we get your input on this? Thanks ChenYu
Hi Chen-Yu, On Wed, Jan 29, 2014 at 09:52:57AM +0800, Chen-Yu Tsai wrote: > Hi Maxime, > > On Fri, Jan 17, 2014 at 10:55 AM, Emilio López <emilio@elopez.com.ar> wrote: > > Hi, > > > > El 09/01/14 05:52, Chen-Yu Tsai escribió: > > > >> clock-output-names is now required for most of sunxi clock nodes, to > >> provide the name of the corresponding clock. Add the new requirements, > >> exceptions, as well as examples. > >> > >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> > >> --- > >> Documentation/devicetree/bindings/clock/sunxi.txt | 36 > >> +++++++++++++++++++---- > >> 1 file changed, 31 insertions(+), 5 deletions(-) > >> > >> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt > >> b/Documentation/devicetree/bindings/clock/sunxi.txt > >> index 0c127cd..8a9147d 100644 > >> --- a/Documentation/devicetree/bindings/clock/sunxi.txt > >> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt > >> @@ -44,10 +44,18 @@ Required properties for all clocks: > >> multiplexed clocks, the list order must match the hardware > >> programming order. > >> - #clock-cells : from common clock binding; shall be set to 0 except for > >> - "allwinner,*-gates-clk" where it shall be set to 1 > >> + "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk" and > >> + "allwinner,sun4i-pll6-clk" where it shall be set to 1 > >> > >> -Additionally, "allwinner,*-gates-clk" clocks require: > >> -- clock-output-names : the corresponding gate names that the clock > >> controls > >> +Additionally, most clocks require "clock-output-names": > >> +- "allwinner,*-gates-clk" : the corresponding gate names that the clock > >> controls > >> +- "allwinner,sun4i-pll5-clk" : "pll5_ddr", "pll5_mbus" > >> +- "allwinner,sun4i-pll6-clk" : "pll6_sata", "pll6_other" > >> +- "allwinner,sun4i-cpu-clk", "allwinner,sun4i-axi-clk", > >> + "allwinner,sun4i-ahb-clk", "allwinner,sun4i-ahb-clk", > >> + "allwinner,sun4i-apb1-mux-clk", "allwinner,sun4i-apb1-clk" > >> + do not need "clock-output-names" > >> +- all others clocks : the corresponding module name of that clock > > > > > > As we discussed on IRC, I wonder if such verbosity is actually needed. Maybe > > we should dictate that all clocks must list their corresponding outputs on > > clock-output-names (with it being the module name if it only has one > > output). > > Maxime, could we get your input on this? I didn't get it was a question for me. But I'm fine with both. If making clock-output-names mandatory makes our life easier, let's do it. Maxime
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt index 0c127cd..8a9147d 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt @@ -44,10 +44,18 @@ Required properties for all clocks: multiplexed clocks, the list order must match the hardware programming order. - #clock-cells : from common clock binding; shall be set to 0 except for - "allwinner,*-gates-clk" where it shall be set to 1 + "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk" and + "allwinner,sun4i-pll6-clk" where it shall be set to 1 -Additionally, "allwinner,*-gates-clk" clocks require: -- clock-output-names : the corresponding gate names that the clock controls +Additionally, most clocks require "clock-output-names": +- "allwinner,*-gates-clk" : the corresponding gate names that the clock controls +- "allwinner,sun4i-pll5-clk" : "pll5_ddr", "pll5_mbus" +- "allwinner,sun4i-pll6-clk" : "pll6_sata", "pll6_other" +- "allwinner,sun4i-cpu-clk", "allwinner,sun4i-axi-clk", + "allwinner,sun4i-ahb-clk", "allwinner,sun4i-ahb-clk", + "allwinner,sun4i-apb1-mux-clk", "allwinner,sun4i-apb1-clk" + do not need "clock-output-names" +- all others clocks : the corresponding module name of that clock Clock consumers should specify the desired clocks they use with a "clocks" phandle cell. Consumers that are using a gated clock should @@ -56,18 +64,28 @@ offset of the bit controlling this particular gate in the register. For example: -osc24M: osc24M@01c20050 { +osc24M: clk@01c20050 { #clock-cells = <0>; compatible = "allwinner,sun4i-osc-clk"; reg = <0x01c20050 0x4>; clocks = <&osc24M_fixed>; + clock-output-names = "osc24M"; }; -pll1: pll1@01c20000 { +pll1: clk@01c20000 { #clock-cells = <0>; compatible = "allwinner,sun4i-pll1-clk"; reg = <0x01c20000 0x4>; clocks = <&osc24M>; + clock-output-names = "pll1"; +}; + +pll5: clk@01c20020 { + #clock-cells = <1>; + compatible = "allwinner,sun4i-pll5-clk"; + reg = <0x01c20020 0x4>; + clocks = <&osc24M>; + clock-output-names = "pll5_ddr", "pll5_other"; }; cpu: cpu@01c20054 { @@ -76,3 +94,11 @@ cpu: cpu@01c20054 { reg = <0x01c20054 0x4>; clocks = <&osc32k>, <&osc24M>, <&pll1>; }; + +mmc0_clk: clk@01c20088 { + #clock-cells = <0>; + compatible = "allwinner,sun4i-mod0-clk"; + reg = <0x01c20088 0x4>; + clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; + clock-output-names = "mmc0"; +};
clock-output-names is now required for most of sunxi clock nodes, to provide the name of the corresponding clock. Add the new requirements, exceptions, as well as examples. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- Documentation/devicetree/bindings/clock/sunxi.txt | 36 +++++++++++++++++++---- 1 file changed, 31 insertions(+), 5 deletions(-)