| Message ID | 1390861218-11616-5-git-send-email-kenneth@whitecape.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, Jan 27, 2014 at 02:20:18PM -0800, Kenneth Graunke wrote: > These should only be necessary on pre-production hardware. > > Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 418e055..3ad5483 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5008,6 +5008,7 @@ > #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3) > > #define GEN8_ROW_CHICKEN 0xe4f0 > +#define INSTRUCTION_SHOOTDOWN_DISABLE (1<<9) > #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) > #define STALL_DOP_GATING_DISABLE (1<<5) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 801d439..3cec13f 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4717,6 +4717,18 @@ static void gen8_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN8_ROW_CHICKEN, > _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE)); > > + /* WaDisableInstructionShootdown:bdw - pre-production only */ > + I915_WRITE(GEN8_ROW_CHICKEN, > + _MASKED_BIT_ENABLE(INSTRUCTION_SHOOTDOWN_DISABLE)); > + > + /* WaDisableThreadStallDopClockGating:bdw - pre-production only */ > + I915_WRITE(GEN8_ROW_CHICKEN, > + _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE)); bspec leads me to believe this one is not pre-production only. > + > + /* WaDisableRowChickenDopClockGating:bdw - pre-production only */ > + I915_WRITE(GEN7_ROW_CHICKEN2, > + _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE)); > + > /* > * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for > * pre-production hardware Other than the two minor nitpicks, lgtm in patch 1, and here: Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 418e055..3ad5483 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5008,6 +5008,7 @@ #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3) #define GEN8_ROW_CHICKEN 0xe4f0 +#define INSTRUCTION_SHOOTDOWN_DISABLE (1<<9) #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) #define STALL_DOP_GATING_DISABLE (1<<5) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 801d439..3cec13f 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4717,6 +4717,18 @@ static void gen8_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_ROW_CHICKEN, _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE)); + /* WaDisableInstructionShootdown:bdw - pre-production only */ + I915_WRITE(GEN8_ROW_CHICKEN, + _MASKED_BIT_ENABLE(INSTRUCTION_SHOOTDOWN_DISABLE)); + + /* WaDisableThreadStallDopClockGating:bdw - pre-production only */ + I915_WRITE(GEN8_ROW_CHICKEN, + _MASKED_BIT_ENABLE(STALL_DOP_GATING_DISABLE)); + + /* WaDisableRowChickenDopClockGating:bdw - pre-production only */ + I915_WRITE(GEN7_ROW_CHICKEN2, + _MASKED_BIT_ENABLE(DOP_CLOCK_GATING_DISABLE)); + /* * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for * pre-production hardware
These should only be necessary on pre-production hardware. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++ 2 files changed, 13 insertions(+)